{"id":"https://openalex.org/W3012196409","doi":"https://doi.org/10.1109/tcad.2020.2982134","title":"Temperature Aware Adaptations for Improved Read Reliability in STT-MRAM Memory Subsystem","display_name":"Temperature Aware Adaptations for Improved Read Reliability in STT-MRAM Memory Subsystem","publication_year":2020,"publication_date":"2020-03-20","ids":{"openalex":"https://openalex.org/W3012196409","doi":"https://doi.org/10.1109/tcad.2020.2982134","mag":"3012196409"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2020.2982134","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2020.2982134","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5082949765","display_name":"S.K. Sethuraman","orcid":"https://orcid.org/0000-0001-7957-8443"},"institutions":[{"id":"https://openalex.org/I4210101034","display_name":"Birla Institute of Technology and Science - Hyderabad Campus","ror":"https://ror.org/014ctt859","country_code":"IN","type":"education","lineage":["https://openalex.org/I4210101034","https://openalex.org/I74796645"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Saravanan Sethuraman","raw_affiliation_strings":["Department of EEE, Birla Institute of Technology and Science\u2014Hyderabad Campus, Hyderabad, India"],"raw_orcid":"https://orcid.org/0000-0001-7957-8443","affiliations":[{"raw_affiliation_string":"Department of EEE, Birla Institute of Technology and Science\u2014Hyderabad Campus, Hyderabad, India","institution_ids":["https://openalex.org/I4210101034"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5022266082","display_name":"Venkata Kalyan Tavva","orcid":"https://orcid.org/0000-0001-6596-2292"},"institutions":[{"id":"https://openalex.org/I119241673","display_name":"Indian Institute of Technology Ropar","ror":"https://ror.org/02qkhhn56","country_code":"IN","type":"education","lineage":["https://openalex.org/I119241673"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Venkata Kalyan Tavva","raw_affiliation_strings":["Department of CSE, Indian Institute of Technology Ropar, Rupnagar, India"],"raw_orcid":"https://orcid.org/0000-0001-6596-2292","affiliations":[{"raw_affiliation_string":"Department of CSE, Indian Institute of Technology Ropar, Rupnagar, India","institution_ids":["https://openalex.org/I119241673"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5062170033","display_name":"Karthick Rajamani","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156936","display_name":"IBM Research - Austin","ror":"https://ror.org/05gjbbg60","country_code":"US","type":"facility","lineage":["https://openalex.org/I1341412227","https://openalex.org/I4210114115","https://openalex.org/I4210156936"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Karthick Rajamani","raw_affiliation_strings":["IBM Austin Research Laboratory, Optimized Cloud Infrastructure, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Austin Research Laboratory, Optimized Cloud Infrastructure, Austin, TX, USA","institution_ids":["https://openalex.org/I4210156936"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110043078","display_name":"C.K. Subramanian","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Chitra K. Subramanian","raw_affiliation_strings":["VLSI Research, Optimized Cloud Infrastructure, IBM Research, Yorktown Heights, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VLSI Research, Optimized Cloud Infrastructure, IBM Research, Yorktown Heights, NY, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073463020","display_name":"Kyu Hyun Kim","orcid":"https://orcid.org/0000-0002-5624-8465"},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kyu-Hyoun Kim","raw_affiliation_strings":["IBM Research, Yorktown Heights, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Research, Yorktown Heights, NY, USA","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030648912","display_name":"Hillery C. Hunter","orcid":null},"institutions":[{"id":"https://openalex.org/I1341412227","display_name":"IBM (United States)","ror":"https://ror.org/05hh8d621","country_code":"US","type":"company","lineage":["https://openalex.org/I1341412227"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hillery C. Hunter","raw_affiliation_strings":["IBM Research, Yorktown Heights, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"IBM Research, Yorktown Heights, NY, USA","institution_ids":["https://openalex.org/I1341412227"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5079825929","display_name":"M. B. Srinivas","orcid":"https://orcid.org/0000-0003-1555-3639"},"institutions":[{"id":"https://openalex.org/I4210101034","display_name":"Birla Institute of Technology and Science - Hyderabad Campus","ror":"https://ror.org/014ctt859","country_code":"IN","type":"education","lineage":["https://openalex.org/I4210101034","https://openalex.org/I74796645"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"M. B. Srinivas","raw_affiliation_strings":["Department of EEE, Birla Institute of Technology and Science\u2014Hyderabad Campus, Hyderabad, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of EEE, Birla Institute of Technology and Science\u2014Hyderabad Campus, Hyderabad, India","institution_ids":["https://openalex.org/I4210101034"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.3028,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.54341416,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"39","issue":"12","first_page":"4635","last_page":"4644"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/magnetoresistive-random-access-memory","display_name":"Magnetoresistive random-access memory","score":0.9517546892166138},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.6755048036575317},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.45065945386886597},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.36107850074768066},{"id":"https://openalex.org/keywords/psychology","display_name":"Psychology","score":0.34742534160614014},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.1404496431350708},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.12859925627708435},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.12739670276641846},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.10418891906738281}],"concepts":[{"id":"https://openalex.org/C46891859","wikidata":"https://www.wikidata.org/wiki/Q1061546","display_name":"Magnetoresistive random-access memory","level":3,"score":0.9517546892166138},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.6755048036575317},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.45065945386886597},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.36107850074768066},{"id":"https://openalex.org/C15744967","wikidata":"https://www.wikidata.org/wiki/Q9418","display_name":"Psychology","level":0,"score":0.34742534160614014},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.1404496431350708},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.12859925627708435},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.12739670276641846},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.10418891906738281},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.2020.2982134","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2020.2982134","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.49000000953674316}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":45,"referenced_works":["https://openalex.org/W1963552944","https://openalex.org/W1975035693","https://openalex.org/W1977072728","https://openalex.org/W1980891674","https://openalex.org/W1986553915","https://openalex.org/W2003243790","https://openalex.org/W2009481135","https://openalex.org/W2013926988","https://openalex.org/W2046861157","https://openalex.org/W2047425695","https://openalex.org/W2071976647","https://openalex.org/W2085577656","https://openalex.org/W2102209351","https://openalex.org/W2110276925","https://openalex.org/W2113026085","https://openalex.org/W2115553608","https://openalex.org/W2140443663","https://openalex.org/W2144896327","https://openalex.org/W2147657366","https://openalex.org/W2147926533","https://openalex.org/W2154157669","https://openalex.org/W2155551886","https://openalex.org/W2162639668","https://openalex.org/W2217106244","https://openalex.org/W2293836883","https://openalex.org/W2328430807","https://openalex.org/W2331328369","https://openalex.org/W2345363724","https://openalex.org/W2401752548","https://openalex.org/W2518194751","https://openalex.org/W2518635392","https://openalex.org/W2527848006","https://openalex.org/W2543205889","https://openalex.org/W2604115586","https://openalex.org/W2607489744","https://openalex.org/W2612472683","https://openalex.org/W2734552968","https://openalex.org/W2762314778","https://openalex.org/W2770734601","https://openalex.org/W2953880845","https://openalex.org/W4229757405","https://openalex.org/W4252811018","https://openalex.org/W6662226531","https://openalex.org/W6681098565","https://openalex.org/W6741211085"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W2033512842","https://openalex.org/W4322734194","https://openalex.org/W1607054433","https://openalex.org/W3005535424","https://openalex.org/W4233600955","https://openalex.org/W2913665393","https://openalex.org/W2369695847","https://openalex.org/W2994319598","https://openalex.org/W2110842462"],"abstract_inverted_index":{"Spin-transfer":[0],"torque":[1],"magneto-resistive":[2],"random-access":[3],"memory":[4,25,83,134,168],"(STT-MRAM)":[5],"is":[6,56,64,86],"an":[7,67,81,137,142],"exciting":[8],"new":[9],"emerging":[10],"technology,":[11],"being":[12],"considered":[13],"as":[14],"a":[15,157],"strong":[16],"candidate":[17],"to":[18],"fill":[19],"the":[20,23,30,48,58,74,119,131],"gaps":[21],"in":[22,167],"existing":[24,90],"hierarchy":[26],"between":[27],"DRAM":[28],"and":[29,41,94,98,170],"secondary":[31],"memory.":[32],"STT-MRAM":[33,82],"has":[34],"adequate":[35],"endurance.":[36],"However,":[37],"unresolved":[38],"write":[39],"switching":[40],"read":[42,59,96,99,139,160],"reliability":[43,72,129],"issues":[44],"still":[45],"exist":[46],"at":[47,66,118],"functional":[49],"operating":[50,76,106],"temperature":[51,77,107,111,124],"corners.":[52],"One":[53],"biggest":[54],"challenge":[55],"that":[57,85],"bit":[60],"error":[61],"rate":[62,102],"(RBER)":[63],"not":[65],"acceptable":[68,143],"level":[69],"for":[70,115],"system":[71,149,177],"across":[73],"wide":[75],"range.":[78],"We":[79,109],"present":[80],"subsystem":[84,135],"fully":[87],"compatible":[88],"with":[89,136,164],"DDR-based":[91],"DIMM":[92],"designs":[93],"evaluate":[95],"disturb":[97,161],"sense":[100],"bit-error":[101],"(BER)":[103],"under":[104],"various":[105],"conditions.":[108],"propose":[110],"aware":[112],"adaptive":[113],"techniques":[114],"reliable":[116],"reads":[117],"rank":[120],"level.":[121],"The":[122],"proposed":[123],"adaptation":[125],"technique":[126],"improves":[127],"overall":[128,176],"of":[130,154],"DDR4":[132],"STT-MRAM-based":[133],"optimal":[138],"current":[140],"considering":[141],"64-byte":[144],"cacheline":[145],"BER.":[146],"Our":[147],"full":[148],"simulations":[150],"show":[151],"1000\u00d7":[152],"order":[153],"improvements":[155],"toward":[156],"cell":[158],"raw":[159],"BER":[162],"along":[163],"5%":[165],"reduction":[166],"power":[169],"less":[171],"than":[172],"1%":[173],"impact":[174],"on":[175],"performance.":[178]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}