{"id":"https://openalex.org/W2966470162","doi":"https://doi.org/10.1109/tcad.2019.2931188","title":"SIMPLER MAGIC: Synthesis and Mapping of In-Memory Logic Executed in a Single Row to Improve Throughput","display_name":"SIMPLER MAGIC: Synthesis and Mapping of In-Memory Logic Executed in a Single Row to Improve Throughput","publication_year":2019,"publication_date":"2019-07-30","ids":{"openalex":"https://openalex.org/W2966470162","doi":"https://doi.org/10.1109/tcad.2019.2931188","mag":"2966470162"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2019.2931188","is_oa":true,"landing_page_url":"https://doi.org/10.1109/tcad.2019.2931188","pdf_url":"https://ieeexplore.ieee.org/ielx7/43/9204502/08781866.pdf","source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"hybrid","oa_url":"https://ieeexplore.ieee.org/ielx7/43/9204502/08781866.pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5060605750","display_name":"Rotem Ben-Hur","orcid":"https://orcid.org/0000-0002-8995-7655"},"institutions":[{"id":"https://openalex.org/I174306211","display_name":"Technion \u2013 Israel Institute of Technology","ror":"https://ror.org/03qryx823","country_code":"IL","type":"education","lineage":["https://openalex.org/I174306211"]}],"countries":["IL"],"is_corresponding":true,"raw_author_name":"Rotem Ben-Hur","raw_affiliation_strings":["Andrew and Erna Viterbi Faculty of Electrical Engineering, Technion \u2013 Israel Institute of Technology, Haifa, Israel"],"raw_orcid":"https://orcid.org/0000-0002-8995-7655","affiliations":[{"raw_affiliation_string":"Andrew and Erna Viterbi Faculty of Electrical Engineering, Technion \u2013 Israel Institute of Technology, Haifa, Israel","institution_ids":["https://openalex.org/I174306211"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043586560","display_name":"Ronny Ronen","orcid":"https://orcid.org/0000-0002-0341-284X"},"institutions":[{"id":"https://openalex.org/I174306211","display_name":"Technion \u2013 Israel Institute of Technology","ror":"https://ror.org/03qryx823","country_code":"IL","type":"education","lineage":["https://openalex.org/I174306211"]}],"countries":["IL"],"is_corresponding":false,"raw_author_name":"Ronny Ronen","raw_affiliation_strings":["Andrew and Erna Viterbi Faculty of Electrical Engineering, Technion \u2013 Israel Institute of Technology, Haifa, Israel"],"raw_orcid":"https://orcid.org/0000-0002-0341-284X","affiliations":[{"raw_affiliation_string":"Andrew and Erna Viterbi Faculty of Electrical Engineering, Technion \u2013 Israel Institute of Technology, Haifa, Israel","institution_ids":["https://openalex.org/I174306211"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023309381","display_name":"Ameer Haj-Ali","orcid":"https://orcid.org/0000-0001-8515-2828"},"institutions":[{"id":"https://openalex.org/I95457486","display_name":"University of California, Berkeley","ror":"https://ror.org/01an7q238","country_code":"US","type":"education","lineage":["https://openalex.org/I95457486"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ameer Haj-Ali","raw_affiliation_strings":["Faculty of Electrical Engineering and Computer Science, University of California at Berkeley, Berkeley, USA"],"raw_orcid":"https://orcid.org/0000-0001-8515-2828","affiliations":[{"raw_affiliation_string":"Faculty of Electrical Engineering and Computer Science, University of California at Berkeley, Berkeley, USA","institution_ids":["https://openalex.org/I95457486"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074456876","display_name":"Debjyoti Bhattacharjee","orcid":"https://orcid.org/0000-0001-6561-8934"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Debjyoti Bhattacharjee","raw_affiliation_strings":["School of Computer Science and Engineering, Nanyang Technological University, Singapore"],"raw_orcid":"https://orcid.org/0000-0001-6561-8934","affiliations":[{"raw_affiliation_string":"School of Computer Science and Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064955900","display_name":"Adi Eliahu","orcid":"https://orcid.org/0000-0003-1033-6168"},"institutions":[{"id":"https://openalex.org/I174306211","display_name":"Technion \u2013 Israel Institute of Technology","ror":"https://ror.org/03qryx823","country_code":"IL","type":"education","lineage":["https://openalex.org/I174306211"]}],"countries":["IL"],"is_corresponding":false,"raw_author_name":"Adi Eliahu","raw_affiliation_strings":["Andrew and Erna Viterbi Faculty of Electrical Engineering, Technion \u2013 Israel Institute of Technology, Haifa, Israel"],"raw_orcid":"https://orcid.org/0000-0003-1033-6168","affiliations":[{"raw_affiliation_string":"Andrew and Erna Viterbi Faculty of Electrical Engineering, Technion \u2013 Israel Institute of Technology, Haifa, Israel","institution_ids":["https://openalex.org/I174306211"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5115590847","display_name":"Natan Peled","orcid":null},"institutions":[{"id":"https://openalex.org/I174306211","display_name":"Technion \u2013 Israel Institute of Technology","ror":"https://ror.org/03qryx823","country_code":"IL","type":"education","lineage":["https://openalex.org/I174306211"]}],"countries":["IL"],"is_corresponding":false,"raw_author_name":"Natan Peled","raw_affiliation_strings":["Andrew and Erna Viterbi Faculty of Electrical Engineering, Technion \u2013 Israel Institute of Technology, Haifa, Israel"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Andrew and Erna Viterbi Faculty of Electrical Engineering, Technion \u2013 Israel Institute of Technology, Haifa, Israel","institution_ids":["https://openalex.org/I174306211"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5014138496","display_name":"Shahar Kvatinsky","orcid":"https://orcid.org/0000-0001-7277-7271"},"institutions":[{"id":"https://openalex.org/I174306211","display_name":"Technion \u2013 Israel Institute of Technology","ror":"https://ror.org/03qryx823","country_code":"IL","type":"education","lineage":["https://openalex.org/I174306211"]}],"countries":["IL"],"is_corresponding":false,"raw_author_name":"Shahar Kvatinsky","raw_affiliation_strings":["Andrew and Erna Viterbi Faculty of Electrical Engineering, Technion \u2013 Israel Institute of Technology, Haifa, Israel"],"raw_orcid":"https://orcid.org/0000-0001-7277-7271","affiliations":[{"raw_affiliation_string":"Andrew and Erna Viterbi Faculty of Electrical Engineering, Technion \u2013 Israel Institute of Technology, Haifa, Israel","institution_ids":["https://openalex.org/I174306211"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5060605750"],"corresponding_institution_ids":["https://openalex.org/I174306211"],"apc_list":null,"apc_paid":null,"fwci":5.5691,"has_fulltext":true,"cited_by_count":108,"citation_normalized_percentile":{"value":0.96522517,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":100},"biblio":{"volume":"39","issue":"10","first_page":"2434","last_page":"2447"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12236","display_name":"Photoreceptor and optogenetics research","score":0.994700014591217,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8266757130622864},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6523318290710449},{"id":"https://openalex.org/keywords/flat-memory-model","display_name":"Flat memory model","score":0.5293073654174805},{"id":"https://openalex.org/keywords/memory-address","display_name":"Memory address","score":0.47951748967170715},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.4359847903251648},{"id":"https://openalex.org/keywords/registered-memory","display_name":"Registered memory","score":0.41886937618255615},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.415093332529068},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.36202508211135864},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.32516324520111084},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.2989223003387451},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.2557050585746765}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8266757130622864},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6523318290710449},{"id":"https://openalex.org/C57863822","wikidata":"https://www.wikidata.org/wiki/Q905488","display_name":"Flat memory model","level":4,"score":0.5293073654174805},{"id":"https://openalex.org/C153247305","wikidata":"https://www.wikidata.org/wiki/Q835713","display_name":"Memory address","level":3,"score":0.47951748967170715},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.4359847903251648},{"id":"https://openalex.org/C93446704","wikidata":"https://www.wikidata.org/wiki/Q449328","display_name":"Registered memory","level":3,"score":0.41886937618255615},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.415093332529068},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.36202508211135864},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.32516324520111084},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.2989223003387451},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.2557050585746765},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.2019.2931188","is_oa":true,"landing_page_url":"https://doi.org/10.1109/tcad.2019.2931188","pdf_url":"https://ieeexplore.ieee.org/ielx7/43/9204502/08781866.pdf","source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1109/tcad.2019.2931188","is_oa":true,"landing_page_url":"https://doi.org/10.1109/tcad.2019.2931188","pdf_url":"https://ieeexplore.ieee.org/ielx7/43/9204502/08781866.pdf","source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.9100000262260437}],"awards":[{"id":"https://openalex.org/G186763818","display_name":null,"funder_award_id":"1514/17","funder_id":"https://openalex.org/F4320322252","funder_display_name":"Israel Science Foundation"},{"id":"https://openalex.org/G3672565922","display_name":null,"funder_award_id":"757259","funder_id":"https://openalex.org/F4320334678","funder_display_name":"European Research Council"},{"id":"https://openalex.org/G8152006990","display_name":"Memristive In-Memory Processing System","funder_award_id":"757259","funder_id":"https://openalex.org/F4320320300","funder_display_name":"European Commission"}],"funders":[{"id":"https://openalex.org/F4320320300","display_name":"European Commission","ror":"https://ror.org/00k4n6c32"},{"id":"https://openalex.org/F4320322252","display_name":"Israel Science Foundation","ror":"https://ror.org/04sazxf24"},{"id":"https://openalex.org/F4320334678","display_name":"European Research Council","ror":"https://ror.org/0472cxd90"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":41,"referenced_works":["https://openalex.org/W73629738","https://openalex.org/W100092388","https://openalex.org/W1480909796","https://openalex.org/W2013028205","https://openalex.org/W2025674646","https://openalex.org/W2036687738","https://openalex.org/W2056304107","https://openalex.org/W2059126686","https://openalex.org/W2064972007","https://openalex.org/W2066280488","https://openalex.org/W2081729575","https://openalex.org/W2102255233","https://openalex.org/W2112980698","https://openalex.org/W2122230401","https://openalex.org/W2126693329","https://openalex.org/W2162651880","https://openalex.org/W2164577583","https://openalex.org/W2216132385","https://openalex.org/W2242458479","https://openalex.org/W2269491305","https://openalex.org/W2345622364","https://openalex.org/W2407339173","https://openalex.org/W2518875864","https://openalex.org/W2576918530","https://openalex.org/W2613569094","https://openalex.org/W2625133503","https://openalex.org/W2766489088","https://openalex.org/W2772943299","https://openalex.org/W2799046832","https://openalex.org/W2799942529","https://openalex.org/W2810804228","https://openalex.org/W2896971879","https://openalex.org/W2944847443","https://openalex.org/W3106213055","https://openalex.org/W4243513274","https://openalex.org/W4246219036","https://openalex.org/W4253978541","https://openalex.org/W6604015932","https://openalex.org/W6675347859","https://openalex.org/W6678797189","https://openalex.org/W6704402733"],"related_works":["https://openalex.org/W4214748026","https://openalex.org/W1554378476","https://openalex.org/W4293054943","https://openalex.org/W2491097902","https://openalex.org/W2041174925","https://openalex.org/W2361382102","https://openalex.org/W2145484885","https://openalex.org/W2493772236","https://openalex.org/W2011772808","https://openalex.org/W4312692645"],"abstract_inverted_index":{"In-memory":[0],"processing":[1,27],"can":[2],"dramatically":[3],"improve":[4],"the":[5,15,19,22,30,91,140,144,153,167,187,209,243],"latency":[6,192],"and":[7,21,68,76,101,119,230],"energy":[8],"consumption":[9],"of":[10,26,52,79,93,99,112,152,166,206,221],"computing":[11],"systems":[12],"by":[13,143],"minimizing":[14],"data":[16,182],"transfer":[17],"between":[18],"memory":[20,31,127],"processor.":[23],"Efficient":[24],"execution":[25,81,92],"operations":[28,96,118],"within":[29,57,123],"is":[32],"therefore,":[33],"a":[34,45,58,83,87,104,110,124,163,197],"highly":[35],"motivated":[36],"objective":[37],"in":[38,82,97,228,233,250],"modern":[39],"computer":[40],"architecture.":[41],"This":[42,136,169],"article":[43],"presents":[44],"novel":[46],"automatic":[47],"framework":[48],"for":[49,176,196,242],"efficient":[50],"implementation":[51],"arbitrary":[53],"combinational":[54],"logic":[55,64,80,95,115,154],"functions":[56],"memristive":[59],"memory.":[60,168],"Using":[61],"tools":[62,211],"from":[63],"design,":[65],"graph":[66],"theory":[67],"compiler":[69],"register":[70],"allocation":[71],"technology,":[72],"we":[73],"developed":[74],"synthesis":[75],"in-memory":[77,94,178],"mapping":[78],"single":[84,125,164,179,198],"row":[85,165],"(SIMPLER),":[86],"tool":[88],"that":[89],"optimizes":[90,191],"terms":[98],"throughput":[100,195,204,220],"area.":[102],"Given":[103],"logical":[105],"function,":[106],"SIMPLER":[107,172,200,217],"automatically":[108],"generates":[109],"sequence":[111],"atomic":[113],"memristor-aided":[114],"(MAGIC)":[116],"NOR":[117,146],"efficiently":[120],"locates":[121],"them":[122],"sizelimited":[126],"row,":[128],"reusing":[129],"cells":[130],"to":[131,156,186,215,246],"save":[132],"area":[133,229,234],"when":[134],"needed.":[135],"approach":[137],"fully":[138,240],"exploits":[139],"parallelism":[141],"offered":[142],"MAGIC":[145],"gates.":[147],"It":[148],"allows":[149],"multiple":[150,181],"instances":[151],"function":[155],"be":[157],"performed":[158],"concurrently,":[159],"each":[160],"compressed":[161],"into":[162],"virtue":[170],"makes":[171],"an":[173,202],"attractive":[174],"candidate":[175],"designing":[177],"instruction,":[180],"(SIMD)":[183],"operations.":[184],"Compared":[185],"previous":[188,210],"work":[189],"(that":[190],"rather":[193],"than":[194,239],"function),":[199],"achieves":[201,218],"average":[203],"improvement":[205,227,232],"435\u00d7.":[207],"When":[208],"are":[212],"parallelized":[213],"similarly":[214],"SIMPLER,":[216],"higher":[219],"at":[222],"least":[223],"5\u00d7,":[224],"with":[225],"23\u00d7":[226],"20\u00d7":[231],"efficiency.":[235],"These":[236],"improvements":[237],"more":[238],"compensate":[241],"increase":[244],"(up":[245],"17%":[247],"on":[248],"average)":[249],"latency.":[251]},"counts_by_year":[{"year":2026,"cited_by_count":4},{"year":2025,"cited_by_count":20},{"year":2024,"cited_by_count":21},{"year":2023,"cited_by_count":17},{"year":2022,"cited_by_count":16},{"year":2021,"cited_by_count":18},{"year":2020,"cited_by_count":10},{"year":2019,"cited_by_count":2}],"updated_date":"2026-05-21T09:19:25.381259","created_date":"2025-10-10T00:00:00"}
