{"id":"https://openalex.org/W2944747679","doi":"https://doi.org/10.1109/tcad.2019.2915324","title":"Fast Lagrangian Relaxation-Based Multithreaded Gate Sizing Using Simple Timing Calibrations","display_name":"Fast Lagrangian Relaxation-Based Multithreaded Gate Sizing Using Simple Timing Calibrations","publication_year":2019,"publication_date":"2019-05-08","ids":{"openalex":"https://openalex.org/W2944747679","doi":"https://doi.org/10.1109/tcad.2019.2915324","mag":"2944747679"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2019.2915324","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2019.2915324","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101818199","display_name":"Ankur Sharma","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156212","display_name":"Mentor Technologies","ror":"https://ror.org/05vewsj04","country_code":"US","type":"other","lineage":["https://openalex.org/I4210156212"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Ankur Sharma","raw_affiliation_strings":["Digital Design and Implementation Solutions Division, Mentor Graphics, Fremont, USA"],"raw_orcid":"https://orcid.org/0000-0003-4759-8663","affiliations":[{"raw_affiliation_string":"Digital Design and Implementation Solutions Division, Mentor Graphics, Fremont, USA","institution_ids":["https://openalex.org/I4210156212"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037827043","display_name":"David Chinnery","orcid":"https://orcid.org/0000-0003-2693-439X"},"institutions":[{"id":"https://openalex.org/I4210156212","display_name":"Mentor Technologies","ror":"https://ror.org/05vewsj04","country_code":"US","type":"other","lineage":["https://openalex.org/I4210156212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"David Chinnery","raw_affiliation_strings":["Digital Design and Implementation Solutions Division, Mentor Graphics, Fremont, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Digital Design and Implementation Solutions Division, Mentor Graphics, Fremont, USA","institution_ids":["https://openalex.org/I4210156212"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102805768","display_name":"T. Reimann","orcid":"https://orcid.org/0000-0002-3730-0213"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Tiago Reimann","raw_affiliation_strings":["Design to Silicon Division, Mentor Graphics, Fremont, USA"],"raw_orcid":"https://orcid.org/0000-0002-3730-0213","affiliations":[{"raw_affiliation_string":"Design to Silicon Division, Mentor Graphics, Fremont, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036827747","display_name":"Sarvesh Bhardwaj","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156212","display_name":"Mentor Technologies","ror":"https://ror.org/05vewsj04","country_code":"US","type":"other","lineage":["https://openalex.org/I4210156212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sarvesh Bhardwaj","raw_affiliation_strings":["Digital Design and Implementation Solutions Division, Mentor Graphics, Fremont, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Digital Design and Implementation Solutions Division, Mentor Graphics, Fremont, USA","institution_ids":["https://openalex.org/I4210156212"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101613339","display_name":"Chris Chu","orcid":"https://orcid.org/0000-0001-6073-1719"},"institutions":[{"id":"https://openalex.org/I173911158","display_name":"Iowa State University","ror":"https://ror.org/04rswrd78","country_code":"US","type":"education","lineage":["https://openalex.org/I173911158"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Chris Chu","raw_affiliation_strings":["Iowa State University, Ames, USA"],"raw_orcid":"https://orcid.org/0000-0001-6073-1719","affiliations":[{"raw_affiliation_string":"Iowa State University, Ames, USA","institution_ids":["https://openalex.org/I173911158"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5101818199"],"corresponding_institution_ids":["https://openalex.org/I4210156212"],"apc_list":null,"apc_paid":null,"fwci":1.2107,"has_fulltext":false,"cited_by_count":24,"citation_normalized_percentile":{"value":0.7951992,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"39","issue":"7","first_page":"1456","last_page":"1469"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/netlist","display_name":"Netlist","score":0.7200684547424316},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.689620852470398},{"id":"https://openalex.org/keywords/lagrangian-relaxation","display_name":"Lagrangian relaxation","score":0.6290387511253357},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.5375539660453796},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.512211263179779},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.46319952607154846},{"id":"https://openalex.org/keywords/lagrange-multiplier","display_name":"Lagrange multiplier","score":0.4524185061454773},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.42197185754776},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.20358720421791077},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.18350887298583984},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1620628535747528}],"concepts":[{"id":"https://openalex.org/C177650935","wikidata":"https://www.wikidata.org/wiki/Q1760303","display_name":"Netlist","level":2,"score":0.7200684547424316},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.689620852470398},{"id":"https://openalex.org/C91765299","wikidata":"https://www.wikidata.org/wiki/Q3424292","display_name":"Lagrangian relaxation","level":2,"score":0.6290387511253357},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.5375539660453796},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.512211263179779},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.46319952607154846},{"id":"https://openalex.org/C73684929","wikidata":"https://www.wikidata.org/wiki/Q598870","display_name":"Lagrange multiplier","level":2,"score":0.4524185061454773},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.42197185754776},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.20358720421791077},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.18350887298583984},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1620628535747528},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.2019.2915324","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2019.2915324","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Reduced inequalities","score":0.7300000190734863,"id":"https://metadata.un.org/sdg/10"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320309469","display_name":"Mentor Graphics","ror":"https://ror.org/00r59k631"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":48,"referenced_works":["https://openalex.org/W1556480701","https://openalex.org/W1569550779","https://openalex.org/W1970529791","https://openalex.org/W1974368829","https://openalex.org/W1984588379","https://openalex.org/W1988888548","https://openalex.org/W1991973217","https://openalex.org/W1993828091","https://openalex.org/W1999291149","https://openalex.org/W2003474320","https://openalex.org/W2019179812","https://openalex.org/W2040498220","https://openalex.org/W2044782068","https://openalex.org/W2074121908","https://openalex.org/W2089299404","https://openalex.org/W2092377129","https://openalex.org/W2100905943","https://openalex.org/W2108795346","https://openalex.org/W2111183063","https://openalex.org/W2120773999","https://openalex.org/W2126900479","https://openalex.org/W2128174223","https://openalex.org/W2131729827","https://openalex.org/W2132233398","https://openalex.org/W2135895868","https://openalex.org/W2139344695","https://openalex.org/W2141907973","https://openalex.org/W2142896025","https://openalex.org/W2143022706","https://openalex.org/W2148995793","https://openalex.org/W2154270708","https://openalex.org/W2171141198","https://openalex.org/W2172629440","https://openalex.org/W2248512261","https://openalex.org/W2331641995","https://openalex.org/W2772108940","https://openalex.org/W2790502156","https://openalex.org/W3143743485","https://openalex.org/W4229816900","https://openalex.org/W4231119589","https://openalex.org/W4235494106","https://openalex.org/W4237297289","https://openalex.org/W4237870867","https://openalex.org/W4238153486","https://openalex.org/W4242813950","https://openalex.org/W6648562321","https://openalex.org/W6679538575","https://openalex.org/W6680809798"],"related_works":["https://openalex.org/W1800827217","https://openalex.org/W27867058","https://openalex.org/W1509211761","https://openalex.org/W4306156203","https://openalex.org/W2391299576","https://openalex.org/W2133693067","https://openalex.org/W1531488649","https://openalex.org/W2070464029","https://openalex.org/W1585350690","https://openalex.org/W2366027386"],"abstract_inverted_index":{"Accurate":[0],"delay":[1,6],"analysis":[2],"with":[3,36,87],"distributed":[4],"RC":[5],"can":[7,12],"be":[8],"computationally":[9],"expensive,":[10],"and":[11,76,84,97,139,154,198,220],"contribute":[13],"the":[14,17,37,145,173,195,207,221],"majority":[15],"of":[16,53,61,121,136,147],"total":[18],"runtime":[19,146,236],"for":[20,73,234],"gate":[21,31,71,80,181,192,200,209,213],"sizers.":[22],"Recent":[23],"works":[24],"have":[25,33,224,241],"shown":[26],"that":[27],"Lagrangian":[28],"relaxation":[29],"(LR)-based":[30],"sizers":[32],"produced":[34],"designs":[35,223,240],"lowest":[38],"power":[39,77,140],"on":[40,216],"average.":[41],"But":[42],"they":[43],"are":[44,106],"also":[45],"very":[46],"slow":[47],"due":[48],"to":[49,110,124,163,167,206],"a":[50,152],"large":[51],"number":[52],"expensive":[54],"timing":[55,75,138,148,165,175,232,243],"updates":[56],"spread":[57],"across":[58],"several":[59],"tens":[60],"iterations.":[62],"In":[63],"this":[64],"paper,":[65],"we":[66,150,230],"develop":[67],"an":[68],"LR-based":[69],"discrete":[70],"sizer":[72,81,193,214],"fast":[74,186],"reduction.":[78],"Our":[79,128],"is":[82,85,215],"multithreaded":[83],"equipped":[86],"parallelization":[88],"enabling":[89],"techniques,":[90],"namely":[91],"mutual":[92],"exclusion":[93],"edge":[94],"(MEE)":[95],"assignment":[96],"directed":[98],"acyclic":[99],"graph":[100],"(DAG)-based":[101],"netlist":[102],"traversal":[103],"(DNT).":[104],"MEEs":[105],"dummy":[107],"edges":[108],"assigned":[109],"improve":[111,168],"load":[112],"sharing":[113],"among":[114],"different":[115,125],"threads.":[116],"DNT":[117],"facilitates":[118,184],"simultaneous":[119],"resizing":[120],"gates":[122],"belonging":[123],"topological":[126],"levels.":[127],"Lagrange":[129],"multiplier":[130],"update":[131],"strategy":[132],"enables":[133],"rapid":[134],"convergence":[135],"our":[137,179,191,211,238],"recovery":[141],"algorithms.":[142],"To":[143],"reduce":[144],"updates,":[149],"propose":[151,161],"simple":[153],"fast-to-compute":[155],"effective":[156],"capacitance":[157],"model.":[158],"We":[159,189],"further":[160],"mechanisms":[162],"calibrate":[164],"models":[166,176],"their":[169],"accuracy.":[170],"By":[171],"calibrating":[172],"internal":[174],"only":[177],"twice,":[178],"proposed":[180,212],"sizing":[182,201],"flow":[183],"extremely":[185],"design":[187],"optimization.":[188],"benchmark":[190,203],"using":[194],"ISPD":[196],"2012":[197],"2013":[199],"contest":[202],"suites.":[204],"Compared":[205],"state-of-the-art":[208],"sizer,":[210],"average":[217],"15\u00d7":[218],"faster":[219],"optimized":[222,239],"2.5%":[225],"higher":[226],"leakage":[227],"power.":[228],"Since":[229],"tradeoff":[231],"accuracy":[233],"larger":[235],"speedup,":[237],"small":[242],"violations.":[244]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":6},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":5},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":4}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}