{"id":"https://openalex.org/W2802691720","doi":"https://doi.org/10.1109/tcad.2018.2834441","title":"Logic BIST With Capture-Per-Clock Hybrid Test Points","display_name":"Logic BIST With Capture-Per-Clock Hybrid Test Points","publication_year":2018,"publication_date":"2018-05-08","ids":{"openalex":"https://openalex.org/W2802691720","doi":"https://doi.org/10.1109/tcad.2018.2834441","mag":"2802691720"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2018.2834441","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2018.2834441","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5060680839","display_name":"Elham Moghaddam","orcid":"https://orcid.org/0000-0001-8697-9544"},"institutions":[{"id":"https://openalex.org/I4210137693","display_name":"Siemens (United States)","ror":"https://ror.org/04axb7e79","country_code":"US","type":"company","lineage":["https://openalex.org/I1325886976","https://openalex.org/I4210137693"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Elham Moghaddam","raw_affiliation_strings":["Mentor, A Siemens Business, Wilsonville, OR, USA"],"affiliations":[{"raw_affiliation_string":"Mentor, A Siemens Business, Wilsonville, OR, USA","institution_ids":["https://openalex.org/I4210137693"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075158519","display_name":"Nilanjan Mukherjee","orcid":"https://orcid.org/0000-0001-6689-7525"},"institutions":[{"id":"https://openalex.org/I4210137693","display_name":"Siemens (United States)","ror":"https://ror.org/04axb7e79","country_code":"US","type":"company","lineage":["https://openalex.org/I1325886976","https://openalex.org/I4210137693"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nilanjan Mukherjee","raw_affiliation_strings":["Mentor, A Siemens Business, Wilsonville, OR, USA"],"affiliations":[{"raw_affiliation_string":"Mentor, A Siemens Business, Wilsonville, OR, USA","institution_ids":["https://openalex.org/I4210137693"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5080960636","display_name":"Janusz Rajski","orcid":"https://orcid.org/0000-0003-2124-447X"},"institutions":[{"id":"https://openalex.org/I4210137693","display_name":"Siemens (United States)","ror":"https://ror.org/04axb7e79","country_code":"US","type":"company","lineage":["https://openalex.org/I1325886976","https://openalex.org/I4210137693"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Janusz Rajski","raw_affiliation_strings":["Mentor, A Siemens Business, Wilsonville, OR, USA"],"affiliations":[{"raw_affiliation_string":"Mentor, A Siemens Business, Wilsonville, OR, USA","institution_ids":["https://openalex.org/I4210137693"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002725206","display_name":"J\u0119drzej Solecki","orcid":null},"institutions":[{"id":"https://openalex.org/I4210137693","display_name":"Siemens (United States)","ror":"https://ror.org/04axb7e79","country_code":"US","type":"company","lineage":["https://openalex.org/I1325886976","https://openalex.org/I4210137693"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jedrzej Solecki","raw_affiliation_strings":["Mentor, A Siemens Business, Wilsonville, OR, USA"],"affiliations":[{"raw_affiliation_string":"Mentor, A Siemens Business, Wilsonville, OR, USA","institution_ids":["https://openalex.org/I4210137693"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072675590","display_name":"Jerzy Tyszer","orcid":"https://orcid.org/0000-0001-9722-2344"},"institutions":[{"id":"https://openalex.org/I46597724","display_name":"Pozna\u0144 University of Technology","ror":"https://ror.org/00p7p3302","country_code":"PL","type":"education","lineage":["https://openalex.org/I46597724"]}],"countries":["PL"],"is_corresponding":false,"raw_author_name":"Jerzy Tyszer","raw_affiliation_strings":["Faculty of Electronics and Telecommunications, Pozna\u0144 University of Technology, Pozna\u0144, Poland"],"affiliations":[{"raw_affiliation_string":"Faculty of Electronics and Telecommunications, Pozna\u0144 University of Technology, Pozna\u0144, Poland","institution_ids":["https://openalex.org/I46597724"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5078225459","display_name":"Justyna Zawada","orcid":"https://orcid.org/0000-0002-1881-8164"},"institutions":[{"id":"https://openalex.org/I46597724","display_name":"Pozna\u0144 University of Technology","ror":"https://ror.org/00p7p3302","country_code":"PL","type":"education","lineage":["https://openalex.org/I46597724"]}],"countries":["PL"],"is_corresponding":false,"raw_author_name":"Justyna Zawada","raw_affiliation_strings":["Faculty of Electronics and Telecommunications, Pozna\u0144 University of Technology, Pozna\u0144, Poland"],"affiliations":[{"raw_affiliation_string":"Faculty of Electronics and Telecommunications, Pozna\u0144 University of Technology, Pozna\u0144, Poland","institution_ids":["https://openalex.org/I46597724"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5060680839"],"corresponding_institution_ids":["https://openalex.org/I4210137693"],"apc_list":null,"apc_paid":null,"fwci":5.2624,"has_fulltext":false,"cited_by_count":40,"citation_normalized_percentile":{"value":0.96106462,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":"38","issue":"6","first_page":"1028","last_page":"1041"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9896000027656555,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.8369101285934448},{"id":"https://openalex.org/keywords/test-compression","display_name":"Test compression","score":0.8333098888397217},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.8042400479316711},{"id":"https://openalex.org/keywords/testability","display_name":"Testability","score":0.6388587951660156},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5589851140975952},{"id":"https://openalex.org/keywords/code-coverage","display_name":"Code coverage","score":0.5300257802009583},{"id":"https://openalex.org/keywords/design-for-testing","display_name":"Design for testing","score":0.5286855101585388},{"id":"https://openalex.org/keywords/scan-chain","display_name":"Scan chain","score":0.5196491479873657},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.49392420053482056},{"id":"https://openalex.org/keywords/time-to-market","display_name":"Time to market","score":0.4853574335575104},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.4726402163505554},{"id":"https://openalex.org/keywords/pseudorandom-number-generator","display_name":"Pseudorandom number generator","score":0.42429015040397644},{"id":"https://openalex.org/keywords/test","display_name":"Test (biology)","score":0.4171949625015259},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.41360390186309814},{"id":"https://openalex.org/keywords/test-set","display_name":"Test set","score":0.41101667284965515},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.38386571407318115},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.32865023612976074},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.21894797682762146},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.15325957536697388},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.12273561954498291},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.09713485836982727}],"concepts":[{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.8369101285934448},{"id":"https://openalex.org/C29652920","wikidata":"https://www.wikidata.org/wiki/Q7705757","display_name":"Test compression","level":4,"score":0.8333098888397217},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.8042400479316711},{"id":"https://openalex.org/C51234621","wikidata":"https://www.wikidata.org/wiki/Q2149495","display_name":"Testability","level":2,"score":0.6388587951660156},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5589851140975952},{"id":"https://openalex.org/C53942775","wikidata":"https://www.wikidata.org/wiki/Q1211721","display_name":"Code coverage","level":3,"score":0.5300257802009583},{"id":"https://openalex.org/C190874656","wikidata":"https://www.wikidata.org/wiki/Q5264347","display_name":"Design for testing","level":3,"score":0.5286855101585388},{"id":"https://openalex.org/C150012182","wikidata":"https://www.wikidata.org/wiki/Q225990","display_name":"Scan chain","level":3,"score":0.5196491479873657},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.49392420053482056},{"id":"https://openalex.org/C2779229675","wikidata":"https://www.wikidata.org/wiki/Q445235","display_name":"Time to market","level":2,"score":0.4853574335575104},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.4726402163505554},{"id":"https://openalex.org/C140642157","wikidata":"https://www.wikidata.org/wiki/Q1623338","display_name":"Pseudorandom number generator","level":2,"score":0.42429015040397644},{"id":"https://openalex.org/C2777267654","wikidata":"https://www.wikidata.org/wiki/Q3519023","display_name":"Test (biology)","level":2,"score":0.4171949625015259},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.41360390186309814},{"id":"https://openalex.org/C169903167","wikidata":"https://www.wikidata.org/wiki/Q3985153","display_name":"Test set","level":2,"score":0.41101667284965515},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.38386571407318115},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.32865023612976074},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.21894797682762146},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.15325957536697388},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.12273561954498291},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.09713485836982727},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.2018.2834441","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2018.2834441","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.41999998688697815,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":72,"referenced_works":["https://openalex.org/W327215","https://openalex.org/W52459088","https://openalex.org/W60738651","https://openalex.org/W1517139843","https://openalex.org/W1562699972","https://openalex.org/W1829756786","https://openalex.org/W1882684267","https://openalex.org/W1934808766","https://openalex.org/W1953724919","https://openalex.org/W1969318341","https://openalex.org/W2008990681","https://openalex.org/W2018796127","https://openalex.org/W2021645550","https://openalex.org/W2060568940","https://openalex.org/W2067601098","https://openalex.org/W2096667381","https://openalex.org/W2096852695","https://openalex.org/W2097270518","https://openalex.org/W2098824454","https://openalex.org/W2101900253","https://openalex.org/W2102404182","https://openalex.org/W2104107023","https://openalex.org/W2104856486","https://openalex.org/W2108500347","https://openalex.org/W2109043970","https://openalex.org/W2111151532","https://openalex.org/W2115910167","https://openalex.org/W2122983144","https://openalex.org/W2123831500","https://openalex.org/W2127343408","https://openalex.org/W2128283796","https://openalex.org/W2133288230","https://openalex.org/W2133610003","https://openalex.org/W2133884850","https://openalex.org/W2134427430","https://openalex.org/W2134593345","https://openalex.org/W2135627440","https://openalex.org/W2137460337","https://openalex.org/W2137515777","https://openalex.org/W2138530143","https://openalex.org/W2140283778","https://openalex.org/W2144033909","https://openalex.org/W2149093111","https://openalex.org/W2150895785","https://openalex.org/W2152408903","https://openalex.org/W2162765851","https://openalex.org/W2162874773","https://openalex.org/W2163575144","https://openalex.org/W2166253090","https://openalex.org/W2167255265","https://openalex.org/W2167639389","https://openalex.org/W2169451209","https://openalex.org/W2523211787","https://openalex.org/W2524537451","https://openalex.org/W2570554800","https://openalex.org/W2570882127","https://openalex.org/W2726285617","https://openalex.org/W2781764167","https://openalex.org/W3148523737","https://openalex.org/W4230343699","https://openalex.org/W4246972245","https://openalex.org/W4246988259","https://openalex.org/W6600011832","https://openalex.org/W6602054072","https://openalex.org/W6602482425","https://openalex.org/W6631122638","https://openalex.org/W6640744092","https://openalex.org/W6678723913","https://openalex.org/W6679754462","https://openalex.org/W6680496137","https://openalex.org/W6681008240","https://openalex.org/W6684812068"],"related_works":["https://openalex.org/W1581610324","https://openalex.org/W2129124567","https://openalex.org/W3088373974","https://openalex.org/W2167571917","https://openalex.org/W2146547687","https://openalex.org/W2620614665","https://openalex.org/W2049913894","https://openalex.org/W2801332551","https://openalex.org/W2899990584","https://openalex.org/W2127184179"],"abstract_inverted_index":{"Logic":[0],"built-in":[1],"self-test":[2],"(LBIST)":[3],"is":[4,184,219],"now":[5],"increasingly":[6],"used":[7,91],"with":[8,68,226],"on-chip":[9],"test":[10,31,53,66,76,85,89,110,132,136,148,172,189,204,235],"compression":[11,86],"as":[12,155],"a":[13,108,142,185,193,223,234],"complementary":[14],"solution":[15],"for":[16,40,243],"in-system":[17],"test,":[18],"where":[19],"high":[20,178],"quality,":[21],"low":[22,24],"power,":[23],"silicon":[25,58],"area,":[26],"and":[27,55,118,200,252],"most":[28],"importantly":[29],"short":[30],"application":[32,152,173],"time":[33,54,174],"are":[34,78,138,167,254],"key":[35],"factors":[36],"affecting":[37],"ICs":[38],"targeted":[39],"safety-critical":[41],"systems.":[42],"Test":[43],"points,":[44],"common":[45],"in":[46,82,141,192],"LBIST-ready":[47],"designs,":[48],"can":[49,63],"help":[50],"to":[51,92,114,119],"reduce":[52,93,115],"the":[56,69,127,156,177,227,249],"overall":[57],"overhead":[59],"so":[60],"that":[61,206,230],"one":[62],"get":[64],"desired":[65,100],"coverage":[67],"minimal":[70,129],"number":[71],"of":[72,126,131,150,187,248],"patterns.":[73],"Typically,":[74],"LBIST":[75,144],"points":[77,90,137,205],"dysfunctional":[79],"when":[80],"enabled":[81],"an":[83],"ATPG-based":[84],"mode.":[87],"Similarly,":[88],"ATPG":[94],"pattern":[95,236],"counts":[96],"(PCs)":[97],"cannot":[98],"guarantee":[99],"random":[101],"testability.":[102],"In":[103],"this":[104],"paper,":[105],"we":[106],"present":[107],"hybrid":[109,135,202],"point":[111],"technology":[112],"designed":[113],"deterministic":[116],"PCs":[117],"improve":[120],"fault":[121,179],"detection":[122],"likelihood":[123],"by":[124,164,169],"means":[125],"same":[128],"set":[130],"points.":[133],"The":[134,181],"subsequently":[139],"deployed":[140],"scan-based":[143],"scheme":[145,183],"addressing":[146],"stringent":[147],"requirements":[149],"certain":[151],"domains":[153],"such":[154],"automotive":[157],"electronics":[158],"market.":[159],"These":[160],"requirements,":[161],"largely":[162],"driven":[163],"safety":[165],"standards,":[166],"met":[168],"significantly":[170],"reducing":[171],"while":[175],"preserving":[176],"coverage.":[180],"new":[182,250],"combination":[186],"pseudorandom":[188],"patterns":[190],"delivered":[191],"test-per-clock":[194],"fashion":[195],"through":[196],"conventional":[197],"scan":[198,215],"chains":[199,229],"per-cycle-driven":[201],"observation":[203],"capture":[207],"faulty":[208],"effects":[209],"every":[210],"shift":[211],"cycle":[212],"into":[213,222],"dedicated":[214],"chains.":[216],"Their":[217],"content":[218],"gradually":[220],"shifted":[221],"compactor":[224],"shared":[225],"remaining":[228],"deliver":[231],"responses":[232],"once":[233],"has":[237],"been":[238],"shifted-in.":[239],"Experimental":[240],"results":[241],"obtained":[242],"industrial":[244],"designs":[245],"confirm":[246],"feasibility":[247],"schemes,":[251],"they":[253],"reported":[255],"herein.":[256]},"counts_by_year":[{"year":2025,"cited_by_count":7},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":6},{"year":2021,"cited_by_count":10},{"year":2020,"cited_by_count":8},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1}],"updated_date":"2026-03-25T14:56:36.534964","created_date":"2025-10-10T00:00:00"}