{"id":"https://openalex.org/W2801795419","doi":"https://doi.org/10.1109/tcad.2018.2834403","title":"Post-Silicon Receiver Equalization Metamodeling by Artificial Neural Networks","display_name":"Post-Silicon Receiver Equalization Metamodeling by Artificial Neural Networks","publication_year":2018,"publication_date":"2018-05-08","ids":{"openalex":"https://openalex.org/W2801795419","doi":"https://doi.org/10.1109/tcad.2018.2834403","mag":"2801795419"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2018.2834403","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2018.2834403","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"http://hdl.handle.net/11117/5930","any_repository_has_fulltext":null},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5077783619","display_name":"Francisco E. Rangel-Pati\u00f1o","orcid":"https://orcid.org/0000-0001-9633-2533"},"institutions":[{"id":"https://openalex.org/I4210133208","display_name":"Centro de Investigaci\u00f3n y Proyectos en Ambiente y Desarrollo","ror":"https://ror.org/03dgk3y06","country_code":"MX","type":"other","lineage":["https://openalex.org/I4210133208"]}],"countries":["MX"],"is_corresponding":true,"raw_author_name":"Francisco Elias Rangel-Patino","raw_affiliation_strings":["Intel Corporation, Zapopan, Mexico"],"raw_orcid":"https://orcid.org/0000-0001-9633-2533","affiliations":[{"raw_affiliation_string":"Intel Corporation, Zapopan, Mexico","institution_ids":["https://openalex.org/I4210133208"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007379610","display_name":"Jos\u00e9 E. Rayas\u2010S\u00e1nchez","orcid":"https://orcid.org/0000-0003-2611-5618"},"institutions":[{"id":"https://openalex.org/I113686770","display_name":"Instituto Tecnol\u00f3gico y de Estudios Superiores de Occidente","ror":"https://ror.org/00cwp6m07","country_code":"MX","type":"education","lineage":["https://openalex.org/I113686770"]},{"id":"https://openalex.org/I193181351","display_name":"Universidad de Guadalajara","ror":"https://ror.org/043xj7k26","country_code":"MX","type":"education","lineage":["https://openalex.org/I193181351"]}],"countries":["MX"],"is_corresponding":false,"raw_author_name":"Jose Ernesto Rayas-Sanchez","raw_affiliation_strings":["Department of Electronics, Systems, and Informatics, ITESO\u2014The Jesuit University of Guadalajara, Tlaquepaque, Mexico"],"raw_orcid":"https://orcid.org/0000-0003-2611-5618","affiliations":[{"raw_affiliation_string":"Department of Electronics, Systems, and Informatics, ITESO\u2014The Jesuit University of Guadalajara, Tlaquepaque, Mexico","institution_ids":["https://openalex.org/I113686770","https://openalex.org/I193181351"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064888457","display_name":"Andr\u00e9s Viveros-Wacher","orcid":"https://orcid.org/0000-0002-1175-249X"},"institutions":[{"id":"https://openalex.org/I4210133208","display_name":"Centro de Investigaci\u00f3n y Proyectos en Ambiente y Desarrollo","ror":"https://ror.org/03dgk3y06","country_code":"MX","type":"other","lineage":["https://openalex.org/I4210133208"]}],"countries":["MX"],"is_corresponding":false,"raw_author_name":"Andres Viveros-Wacher","raw_affiliation_strings":["Intel Corporation, Zapopan, Mexico"],"raw_orcid":"https://orcid.org/0000-0002-1175-249X","affiliations":[{"raw_affiliation_string":"Intel Corporation, Zapopan, Mexico","institution_ids":["https://openalex.org/I4210133208"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5038774896","display_name":"Jos\u00e9 L. Ch\u00e1vez\u2010Hurtado","orcid":"https://orcid.org/0000-0003-4115-0999"},"institutions":[{"id":"https://openalex.org/I113686770","display_name":"Instituto Tecnol\u00f3gico y de Estudios Superiores de Occidente","ror":"https://ror.org/00cwp6m07","country_code":"MX","type":"education","lineage":["https://openalex.org/I113686770"]},{"id":"https://openalex.org/I193181351","display_name":"Universidad de Guadalajara","ror":"https://ror.org/043xj7k26","country_code":"MX","type":"education","lineage":["https://openalex.org/I193181351"]}],"countries":["MX"],"is_corresponding":false,"raw_author_name":"Jose Luis Chavez-Hurtado","raw_affiliation_strings":["Department of Electronics, Systems, and Informatics, ITESO\u2014The Jesuit University of Guadalajara, Tlaquepaque, Mexico"],"raw_orcid":"https://orcid.org/0000-0003-4115-0999","affiliations":[{"raw_affiliation_string":"Department of Electronics, Systems, and Informatics, ITESO\u2014The Jesuit University of Guadalajara, Tlaquepaque, Mexico","institution_ids":["https://openalex.org/I113686770","https://openalex.org/I193181351"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037848770","display_name":"Edgar A. Vega-Ochoa","orcid":null},"institutions":[{"id":"https://openalex.org/I4210133208","display_name":"Centro de Investigaci\u00f3n y Proyectos en Ambiente y Desarrollo","ror":"https://ror.org/03dgk3y06","country_code":"MX","type":"other","lineage":["https://openalex.org/I4210133208"]}],"countries":["MX"],"is_corresponding":false,"raw_author_name":"Edgar Andrei Vega-Ochoa","raw_affiliation_strings":["Intel Corporation, Zapopan, Mexico"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Zapopan, Mexico","institution_ids":["https://openalex.org/I4210133208"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5112619956","display_name":"Nagib Hakim","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nagib Hakim","raw_affiliation_strings":["Intel Corporation, Santa Clara, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5077783619"],"corresponding_institution_ids":["https://openalex.org/I4210133208"],"apc_list":null,"apc_paid":null,"fwci":2.3646,"has_fulltext":false,"cited_by_count":21,"citation_normalized_percentile":{"value":0.88276021,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"38","issue":"4","first_page":"733","last_page":"740"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/metamodeling","display_name":"Metamodeling","score":0.7482994794845581},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.6693439483642578},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6605413556098938},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5824174880981445},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.5813024044036865},{"id":"https://openalex.org/keywords/equalization","display_name":"Equalization (audio)","score":0.5781358480453491},{"id":"https://openalex.org/keywords/phy","display_name":"PHY","score":0.5722529292106628},{"id":"https://openalex.org/keywords/physical-layer","display_name":"Physical layer","score":0.548588216304779},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.38914474844932556},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.23837703466415405},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.2306504249572754},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18942970037460327},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1169678270816803}],"concepts":[{"id":"https://openalex.org/C86610423","wikidata":"https://www.wikidata.org/wiki/Q1925081","display_name":"Metamodeling","level":2,"score":0.7482994794845581},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.6693439483642578},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6605413556098938},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5824174880981445},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.5813024044036865},{"id":"https://openalex.org/C75755367","wikidata":"https://www.wikidata.org/wiki/Q104531076","display_name":"Equalization (audio)","level":3,"score":0.5781358480453491},{"id":"https://openalex.org/C41918916","wikidata":"https://www.wikidata.org/wiki/Q192727","display_name":"PHY","level":4,"score":0.5722529292106628},{"id":"https://openalex.org/C19247436","wikidata":"https://www.wikidata.org/wiki/Q192727","display_name":"Physical layer","level":3,"score":0.548588216304779},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.38914474844932556},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.23837703466415405},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.2306504249572754},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18942970037460327},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1169678270816803},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tcad.2018.2834403","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2018.2834403","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},{"id":"pmh:oai:rei.iteso.mx:11117/5930","is_oa":true,"landing_page_url":"http://hdl.handle.net/11117/5930","pdf_url":null,"source":null,"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":{"id":"pmh:oai:rei.iteso.mx:11117/5930","is_oa":true,"landing_page_url":"http://hdl.handle.net/11117/5930","pdf_url":null,"source":null,"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/article"},"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.4099999964237213}],"awards":[],"funders":[{"id":"https://openalex.org/F4320324348","display_name":"Consejo Nacional de Ciencia y Tecnolog\u00eda, Guatemala","ror":"https://ror.org/03pr08s76"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":42,"referenced_works":["https://openalex.org/W651150315","https://openalex.org/W1523644123","https://openalex.org/W1604084083","https://openalex.org/W1604185664","https://openalex.org/W1973258782","https://openalex.org/W1994230532","https://openalex.org/W1994701518","https://openalex.org/W2040556057","https://openalex.org/W2040655402","https://openalex.org/W2043867873","https://openalex.org/W2093625674","https://openalex.org/W2097527655","https://openalex.org/W2098432798","https://openalex.org/W2101056461","https://openalex.org/W2105476474","https://openalex.org/W2109186610","https://openalex.org/W2118162660","https://openalex.org/W2119415095","https://openalex.org/W2124776405","https://openalex.org/W2137983211","https://openalex.org/W2139802970","https://openalex.org/W2141707025","https://openalex.org/W2152711564","https://openalex.org/W2155752967","https://openalex.org/W2168152492","https://openalex.org/W2289221860","https://openalex.org/W2344478748","https://openalex.org/W2416738184","https://openalex.org/W2513329551","https://openalex.org/W2551471669","https://openalex.org/W2588756236","https://openalex.org/W2617179510","https://openalex.org/W2731979674","https://openalex.org/W2746282999","https://openalex.org/W2911546748","https://openalex.org/W3146803896","https://openalex.org/W4244353238","https://openalex.org/W4252327938","https://openalex.org/W4252410013","https://openalex.org/W4254962629","https://openalex.org/W6649221539","https://openalex.org/W6680900833"],"related_works":["https://openalex.org/W2994999158","https://openalex.org/W2945523224","https://openalex.org/W4313639042","https://openalex.org/W2444418218","https://openalex.org/W4241709719","https://openalex.org/W2727597159","https://openalex.org/W2103723486","https://openalex.org/W1488909492","https://openalex.org/W4234133302","https://openalex.org/W2111773294"],"abstract_inverted_index":{"As":[0],"microprocessor":[1],"design":[2,171],"scales":[3],"to":[4,18,52,96,126,131,156,175],"the":[5,34,45,68,85,102,133,140,159,183,197],"10-nm":[6],"technology":[7,29],"and":[8,12,27,36,57,135],"beyond,":[9],"traditional":[10],"pre-":[11],"post-silicon":[13,49],"validation":[14,40,50,73],"techniques":[15,93,130,174],"are":[16,94,113],"unsuitable":[17],"get":[19],"a":[20,147,162,177,189,206],"full":[21],"system":[22,185],"functional":[23],"coverage.":[24],"Physical":[25],"complexity":[26],"extreme":[28],"process":[30],"variations":[31],"severely":[32],"limits":[33],"effectiveness":[35],"reliability":[37],"of":[38,47,67,74,161,172,181,192],"presilicon":[39],"techniques.":[41],"This":[42],"scenario":[43],"imposes":[44],"need":[46],"sophisticated":[48],"approaches":[51],"consider":[53],"complex":[54],"electromagnetic":[55],"phenomena":[56],"large":[58,190],"manufacturing":[59],"fluctuations":[60],"observed":[61],"in":[62,71,79,84,110],"actual":[63,193],"physical":[64,86],"platforms.":[65],"One":[66],"major":[69],"challenges":[70],"electrical":[72],"high-speed":[75],"input/output":[76],"(HSIO)":[77],"links":[78,112],"modern":[80],"computer":[81],"platforms":[82],"lies":[83],"layer":[87],"(PHY)":[88],"tuning":[89,109,166],"process,":[90],"where":[91],"equalization":[92,138],"used":[95],"cancel":[97],"undesired":[98],"effects":[99,160],"induced":[100],"by":[101,200],"channels.":[103],"Current":[104],"industrial":[105],"practices":[106],"for":[107],"PHY":[108,165],"HSIO":[111,209],"very":[114],"time":[115],"consuming":[116],"since":[117],"they":[118],"require":[119],"massive":[120],"laboratory":[121],"measurements.":[122,194],"An":[123],"alternative":[124],"is":[125,154],"use":[127,169],"machine":[128],"learning":[129],"model":[132,179],"PHY,":[134],"then":[136],"perform":[137],"using":[139],"resultant":[141],"surrogate":[142],"model.":[143],"In":[144],"this":[145],"paper,":[146],"metamodeling":[148],"approach":[149],"based":[150],"on":[151,205],"neural":[152,178],"networks":[153],"proposed":[155],"efficiently":[157],"simulate":[158],"receiver":[163],"equalizer":[164],"settings.":[167],"We":[168,195],"several":[170],"experiments":[173],"find":[176],"capable":[180],"approximating":[182],"real":[184,207],"behavior":[186],"without":[187],"requiring":[188],"amount":[191],"evaluate":[196],"models":[198],"performance":[199],"comparing":[201],"with":[202],"measured":[203],"responses":[204],"server":[208],"link.":[210]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":7},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":3}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}