{"id":"https://openalex.org/W2799969132","doi":"https://doi.org/10.1109/tcad.2018.2834394","title":"Two-Step RF IC Block Synthesis With Preoptimized Inductors and Full Layout Generation In-the-Loop","display_name":"Two-Step RF IC Block Synthesis With Preoptimized Inductors and Full Layout Generation In-the-Loop","publication_year":2018,"publication_date":"2018-05-08","ids":{"openalex":"https://openalex.org/W2799969132","doi":"https://doi.org/10.1109/tcad.2018.2834394","mag":"2799969132"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2018.2834394","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2018.2834394","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://hdl.handle.net/10261/182824","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5060778711","display_name":"Ricardo Martins","orcid":"https://orcid.org/0000-0002-8251-1415"},"institutions":[{"id":"https://openalex.org/I141596103","display_name":"University of Lisbon","ror":"https://ror.org/01c27hj86","country_code":"PT","type":"education","lineage":["https://openalex.org/I141596103"]},{"id":"https://openalex.org/I4210120471","display_name":"Instituto de Telecomunica\u00e7\u00f5es","ror":"https://ror.org/02ht4fk33","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I4210120471"]}],"countries":["PT"],"is_corresponding":true,"raw_author_name":"Ricardo Martins","raw_affiliation_strings":["Instituto de Telecomunica\u00e7\u00f5es, Instituto Superior T\u00e9cnico\u2014Universidade de Lisboa, Lisboa, Portugal"],"raw_orcid":"https://orcid.org/0000-0002-8251-1415","affiliations":[{"raw_affiliation_string":"Instituto de Telecomunica\u00e7\u00f5es, Instituto Superior T\u00e9cnico\u2014Universidade de Lisboa, Lisboa, Portugal","institution_ids":["https://openalex.org/I4210120471","https://openalex.org/I141596103"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065716990","display_name":"Nuno Louren\u00e7o","orcid":"https://orcid.org/0000-0002-9625-6435"},"institutions":[{"id":"https://openalex.org/I141596103","display_name":"University of Lisbon","ror":"https://ror.org/01c27hj86","country_code":"PT","type":"education","lineage":["https://openalex.org/I141596103"]},{"id":"https://openalex.org/I4210120471","display_name":"Instituto de Telecomunica\u00e7\u00f5es","ror":"https://ror.org/02ht4fk33","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I4210120471"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"Nuno Lourenco","raw_affiliation_strings":["Instituto de Telecomunica\u00e7\u00f5es, Instituto Superior T\u00e9cnico\u2014Universidade de Lisboa, Lisboa, Portugal"],"raw_orcid":"https://orcid.org/0000-0002-9625-6435","affiliations":[{"raw_affiliation_string":"Instituto de Telecomunica\u00e7\u00f5es, Instituto Superior T\u00e9cnico\u2014Universidade de Lisboa, Lisboa, Portugal","institution_ids":["https://openalex.org/I4210120471","https://openalex.org/I141596103"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5040394510","display_name":"F\u00e1bio Passos","orcid":"https://orcid.org/0000-0002-5638-7377"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Fabio Passos","raw_affiliation_strings":["Instituto de Microelectr\u00f3nica de Sevilla, CSIC and Universidad de Sevilla, Sevilla, Spain"],"raw_orcid":"https://orcid.org/0000-0002-5638-7377","affiliations":[{"raw_affiliation_string":"Instituto de Microelectr\u00f3nica de Sevilla, CSIC and Universidad de Sevilla, Sevilla, Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073107689","display_name":"Ricardo P\u00f3voa","orcid":"https://orcid.org/0000-0003-2941-7494"},"institutions":[{"id":"https://openalex.org/I141596103","display_name":"University of Lisbon","ror":"https://ror.org/01c27hj86","country_code":"PT","type":"education","lineage":["https://openalex.org/I141596103"]},{"id":"https://openalex.org/I4210120471","display_name":"Instituto de Telecomunica\u00e7\u00f5es","ror":"https://ror.org/02ht4fk33","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I4210120471"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"Ricardo Povoa","raw_affiliation_strings":["Instituto de Telecomunica\u00e7\u00f5es, Instituto Superior T\u00e9cnico\u2014Universidade de Lisboa, Lisboa, Portugal"],"raw_orcid":"https://orcid.org/0000-0003-2941-7494","affiliations":[{"raw_affiliation_string":"Instituto de Telecomunica\u00e7\u00f5es, Instituto Superior T\u00e9cnico\u2014Universidade de Lisboa, Lisboa, Portugal","institution_ids":["https://openalex.org/I4210120471","https://openalex.org/I141596103"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075939956","display_name":"Ant\u00f3nio Canelas","orcid":"https://orcid.org/0000-0002-9414-742X"},"institutions":[{"id":"https://openalex.org/I141596103","display_name":"University of Lisbon","ror":"https://ror.org/01c27hj86","country_code":"PT","type":"education","lineage":["https://openalex.org/I141596103"]},{"id":"https://openalex.org/I4210120471","display_name":"Instituto de Telecomunica\u00e7\u00f5es","ror":"https://ror.org/02ht4fk33","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I4210120471"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"Antonio Canelas","raw_affiliation_strings":["Instituto de Telecomunica\u00e7\u00f5es, Instituto Superior T\u00e9cnico\u2014Universidade de Lisboa, Lisboa, Portugal"],"raw_orcid":"https://orcid.org/0000-0002-9414-742X","affiliations":[{"raw_affiliation_string":"Instituto de Telecomunica\u00e7\u00f5es, Instituto Superior T\u00e9cnico\u2014Universidade de Lisboa, Lisboa, Portugal","institution_ids":["https://openalex.org/I4210120471","https://openalex.org/I141596103"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011140420","display_name":"E. Roca","orcid":"https://orcid.org/0000-0001-6260-6495"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Elisenda Roca","raw_affiliation_strings":["Instituto de Microelectr\u00f3nica de Sevilla, CSIC and Universidad de Sevilla, Sevilla, Spain"],"raw_orcid":"https://orcid.org/0000-0001-6260-6495","affiliations":[{"raw_affiliation_string":"Instituto de Microelectr\u00f3nica de Sevilla, CSIC and Universidad de Sevilla, Sevilla, Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5068422347","display_name":"R. Castro\u2010L\u00f3pez","orcid":"https://orcid.org/0000-0002-6247-3124"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Rafael Castro-Lopez","raw_affiliation_strings":["Instituto de Microelectr\u00f3nica de Sevilla, CSIC and Universidad de Sevilla, Sevilla, Spain"],"raw_orcid":"https://orcid.org/0000-0002-6247-3124","affiliations":[{"raw_affiliation_string":"Instituto de Microelectr\u00f3nica de Sevilla, CSIC and Universidad de Sevilla, Sevilla, Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006096520","display_name":"J. Sieiro","orcid":"https://orcid.org/0000-0001-9545-5347"},"institutions":[{"id":"https://openalex.org/I71999127","display_name":"Universitat de Barcelona","ror":"https://ror.org/021018s57","country_code":"ES","type":"education","lineage":["https://openalex.org/I71999127"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Javier Sieiro","raw_affiliation_strings":["Department of Electronics, University of Barcelona, Barcelona, Spain"],"raw_orcid":"https://orcid.org/0000-0001-9545-5347","affiliations":[{"raw_affiliation_string":"Department of Electronics, University of Barcelona, Barcelona, Spain","institution_ids":["https://openalex.org/I71999127"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5041853563","display_name":"F.V. Fern\u00e1ndez","orcid":"https://orcid.org/0000-0001-8682-2280"},"institutions":[{"id":"https://openalex.org/I4210104545","display_name":"Instituto de Microelectr\u00f3nica de Sevilla","ror":"https://ror.org/01mqtzm43","country_code":"ES","type":"facility","lineage":["https://openalex.org/I134820265","https://openalex.org/I4210104545","https://openalex.org/I4210147934","https://openalex.org/I79238269"]},{"id":"https://openalex.org/I79238269","display_name":"Universidad de Sevilla","ror":"https://ror.org/03yxnpp24","country_code":"ES","type":"education","lineage":["https://openalex.org/I79238269"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Francisco V. Fernandez","raw_affiliation_strings":["Instituto de Microelectr\u00f3nica de Sevilla, CSIC and Universidad de Sevilla, Sevilla, Spain"],"raw_orcid":"https://orcid.org/0000-0001-8682-2280","affiliations":[{"raw_affiliation_string":"Instituto de Microelectr\u00f3nica de Sevilla, CSIC and Universidad de Sevilla, Sevilla, Spain","institution_ids":["https://openalex.org/I4210104545","https://openalex.org/I79238269"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5056512471","display_name":"Nuno Horta","orcid":"https://orcid.org/0000-0002-1687-1447"},"institutions":[{"id":"https://openalex.org/I141596103","display_name":"University of Lisbon","ror":"https://ror.org/01c27hj86","country_code":"PT","type":"education","lineage":["https://openalex.org/I141596103"]},{"id":"https://openalex.org/I4210120471","display_name":"Instituto de Telecomunica\u00e7\u00f5es","ror":"https://ror.org/02ht4fk33","country_code":"PT","type":"nonprofit","lineage":["https://openalex.org/I4210120471"]}],"countries":["PT"],"is_corresponding":false,"raw_author_name":"Nuno Horta","raw_affiliation_strings":["Instituto de Telecomunica\u00e7\u00f5es, Instituto Superior T\u00e9cnico\u2014Universidade de Lisboa, Lisboa, Portugal"],"raw_orcid":"https://orcid.org/0000-0002-1687-1447","affiliations":[{"raw_affiliation_string":"Instituto de Telecomunica\u00e7\u00f5es, Instituto Superior T\u00e9cnico\u2014Universidade de Lisboa, Lisboa, Portugal","institution_ids":["https://openalex.org/I4210120471","https://openalex.org/I141596103"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":10,"corresponding_author_ids":["https://openalex.org/A5060778711"],"corresponding_institution_ids":["https://openalex.org/I141596103","https://openalex.org/I4210120471"],"apc_list":null,"apc_paid":null,"fwci":3.1412,"has_fulltext":false,"cited_by_count":40,"citation_normalized_percentile":{"value":0.92221059,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":"38","issue":"6","first_page":"989","last_page":"1002"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/netlist","display_name":"Netlist","score":0.8213952779769897},{"id":"https://openalex.org/keywords/sizing","display_name":"Sizing","score":0.7398018836975098},{"id":"https://openalex.org/keywords/inductor","display_name":"Inductor","score":0.6265410780906677},{"id":"https://openalex.org/keywords/radio-frequency","display_name":"Radio frequency","score":0.5990456342697144},{"id":"https://openalex.org/keywords/circuit-extraction","display_name":"Circuit extraction","score":0.5486637949943542},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5425965189933777},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5187268853187561},{"id":"https://openalex.org/keywords/integrated-circuit-layout","display_name":"Integrated circuit layout","score":0.5158247351646423},{"id":"https://openalex.org/keywords/design-layout-record","display_name":"Design layout record","score":0.5155184268951416},{"id":"https://openalex.org/keywords/page-layout","display_name":"Page layout","score":0.4983069896697998},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.48553940653800964},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.4607279300689697},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4539780616760254},{"id":"https://openalex.org/keywords/parasitic-extraction","display_name":"Parasitic extraction","score":0.4466361403465271},{"id":"https://openalex.org/keywords/context","display_name":"Context (archaeology)","score":0.4200853705406189},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.3860331177711487},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.30437737703323364},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.29088109731674194},{"id":"https://openalex.org/keywords/equivalent-circuit","display_name":"Equivalent circuit","score":0.28764158487319946},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.25907182693481445},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2338649034500122}],"concepts":[{"id":"https://openalex.org/C177650935","wikidata":"https://www.wikidata.org/wiki/Q1760303","display_name":"Netlist","level":2,"score":0.8213952779769897},{"id":"https://openalex.org/C2777767291","wikidata":"https://www.wikidata.org/wiki/Q1080291","display_name":"Sizing","level":2,"score":0.7398018836975098},{"id":"https://openalex.org/C144534570","wikidata":"https://www.wikidata.org/wiki/Q5325","display_name":"Inductor","level":3,"score":0.6265410780906677},{"id":"https://openalex.org/C74064498","wikidata":"https://www.wikidata.org/wiki/Q3396184","display_name":"Radio frequency","level":2,"score":0.5990456342697144},{"id":"https://openalex.org/C26490066","wikidata":"https://www.wikidata.org/wiki/Q17006835","display_name":"Circuit extraction","level":4,"score":0.5486637949943542},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5425965189933777},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5187268853187561},{"id":"https://openalex.org/C2765594","wikidata":"https://www.wikidata.org/wiki/Q2624187","display_name":"Integrated circuit layout","level":3,"score":0.5158247351646423},{"id":"https://openalex.org/C179145894","wikidata":"https://www.wikidata.org/wiki/Q5264353","display_name":"Design layout record","level":5,"score":0.5155184268951416},{"id":"https://openalex.org/C188985296","wikidata":"https://www.wikidata.org/wiki/Q868954","display_name":"Page layout","level":2,"score":0.4983069896697998},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.48553940653800964},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.4607279300689697},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4539780616760254},{"id":"https://openalex.org/C159818811","wikidata":"https://www.wikidata.org/wiki/Q7135947","display_name":"Parasitic extraction","level":2,"score":0.4466361403465271},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.4200853705406189},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.3860331177711487},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.30437737703323364},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.29088109731674194},{"id":"https://openalex.org/C23572009","wikidata":"https://www.wikidata.org/wiki/Q964981","display_name":"Equivalent circuit","level":3,"score":0.28764158487319946},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.25907182693481445},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2338649034500122},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C144133560","wikidata":"https://www.wikidata.org/wiki/Q4830453","display_name":"Business","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C112698675","wikidata":"https://www.wikidata.org/wiki/Q37038","display_name":"Advertising","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tcad.2018.2834394","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2018.2834394","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},{"id":"pmh:oai:digital.csic.es:10261/182824","is_oa":true,"landing_page_url":"http://hdl.handle.net/10261/182824","pdf_url":null,"source":{"id":"https://openalex.org/S4306401639","display_name":"DIGITAL.CSIC (Spanish National Research Council (CSIC))","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I134820265","host_organization_name":"Consejo Superior de Investigaciones Cient\u00edficas","host_organization_lineage":["https://openalex.org/I134820265"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"art\u00edculo"}],"best_oa_location":{"id":"pmh:oai:digital.csic.es:10261/182824","is_oa":true,"landing_page_url":"http://hdl.handle.net/10261/182824","pdf_url":null,"source":{"id":"https://openalex.org/S4306401639","display_name":"DIGITAL.CSIC (Spanish National Research Council (CSIC))","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I134820265","host_organization_name":"Consejo Superior de Investigaciones Cient\u00edficas","host_organization_lineage":["https://openalex.org/I134820265"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"art\u00edculo"},"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G1308619590","display_name":null,"funder_award_id":"C3-3-R","funder_id":"https://openalex.org/F4320335322","funder_display_name":"European Regional Development Fund"},{"id":"https://openalex.org/G2694095594","display_name":null,"funder_award_id":"TEC2017-83524-R","funder_id":"https://openalex.org/F4320321837","funder_display_name":"Ministerio de Econom\u00eda y Competitividad"},{"id":"https://openalex.org/G2715067491","display_name":null,"funder_award_id":"TEC2016-75151-C3-3-R","funder_id":"https://openalex.org/F4320321837","funder_display_name":"Ministerio de Econom\u00eda y Competitividad"},{"id":"https://openalex.org/G2792018012","display_name":null,"funder_award_id":"P12-TIC-1481","funder_id":"https://openalex.org/F4320326754","funder_display_name":"Junta de Andaluc\u00eda"},{"id":"https://openalex.org/G3850789590","display_name":null,"funder_award_id":"50008","funder_id":"https://openalex.org/F4320334779","funder_display_name":"Funda\u00e7\u00e3o para a Ci\u00eancia e a Tecnologia"},{"id":"https://openalex.org/G6609083033","display_name":null,"funder_award_id":"TEC2016-75151-C3-3-R","funder_id":"https://openalex.org/F4320335322","funder_display_name":"European Regional Development Fund"},{"id":"https://openalex.org/G7899394888","display_name":null,"funder_award_id":"SFRH/BD/103337/2014","funder_id":"https://openalex.org/F4320334779","funder_display_name":"Funda\u00e7\u00e3o para a Ci\u00eancia e a Tecnologia"},{"id":"https://openalex.org/G8599593402","display_name":null,"funder_award_id":"SFRH/BPD/104648/2014","funder_id":"https://openalex.org/F4320334779","funder_display_name":"Funda\u00e7\u00e3o para a Ci\u00eancia e a Tecnologia"},{"id":"https://openalex.org/G88246523","display_name":null,"funder_award_id":"UID/EEA/ 50008/2013","funder_id":"https://openalex.org/F4320334779","funder_display_name":"Funda\u00e7\u00e3o para a Ci\u00eancia e a Tecnologia"},{"id":"https://openalex.org/G8910923968","display_name":null,"funder_award_id":"UID/EEA/ 50008/2013","funder_id":"https://openalex.org/F4320335322","funder_display_name":"European Regional Development Fund"}],"funders":[{"id":"https://openalex.org/F4320321837","display_name":"Ministerio de Econom\u00eda y Competitividad","ror":"https://ror.org/034900433"},{"id":"https://openalex.org/F4320326754","display_name":"Junta de Andaluc\u00eda","ror":"https://ror.org/01jem9c82"},{"id":"https://openalex.org/F4320328988","display_name":"Instituto de Telecomunica\u00e7\u00f5es","ror":"https://ror.org/02ht4fk33"},{"id":"https://openalex.org/F4320334779","display_name":"Funda\u00e7\u00e3o para a Ci\u00eancia e a Tecnologia","ror":"https://ror.org/00snfqn58"},{"id":"https://openalex.org/F4320335322","display_name":"European Regional Development Fund","ror":"https://ror.org/00k4n6c32"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":42,"referenced_works":["https://openalex.org/W1521005979","https://openalex.org/W1565715208","https://openalex.org/W1568441862","https://openalex.org/W1854348697","https://openalex.org/W1981237218","https://openalex.org/W1996605065","https://openalex.org/W1998752433","https://openalex.org/W2007278173","https://openalex.org/W2037662635","https://openalex.org/W2050782477","https://openalex.org/W2063895281","https://openalex.org/W2068923837","https://openalex.org/W2103992623","https://openalex.org/W2104339053","https://openalex.org/W2111776955","https://openalex.org/W2113068346","https://openalex.org/W2113337109","https://openalex.org/W2114725328","https://openalex.org/W2115942268","https://openalex.org/W2116989584","https://openalex.org/W2121112734","https://openalex.org/W2124340165","https://openalex.org/W2126105956","https://openalex.org/W2134202234","https://openalex.org/W2136848459","https://openalex.org/W2140753746","https://openalex.org/W2142408027","https://openalex.org/W2148075699","https://openalex.org/W2155792083","https://openalex.org/W2156076271","https://openalex.org/W2162372871","https://openalex.org/W2346640828","https://openalex.org/W2368587440","https://openalex.org/W2412425681","https://openalex.org/W2532972346","https://openalex.org/W2580673640","https://openalex.org/W2588897393","https://openalex.org/W2591795745","https://openalex.org/W2735015396","https://openalex.org/W4244194021","https://openalex.org/W4256145522","https://openalex.org/W6658251137"],"related_works":["https://openalex.org/W3080940989","https://openalex.org/W4287685600","https://openalex.org/W2091329789","https://openalex.org/W2304374807","https://openalex.org/W2967850598","https://openalex.org/W2376028644","https://openalex.org/W2583707817","https://openalex.org/W4292182797","https://openalex.org/W2253173388","https://openalex.org/W1964352816"],"abstract_inverted_index":{"In":[0,25],"this":[1,29],"paper,":[2],"an":[3,74],"analysis":[4],"of":[5,17,28,95,144,155],"the":[6,10,15,26,92,96,124,138,142,151,156],"methodologies":[7],"proposed":[8,89],"in":[9,137],"past":[11],"years":[12],"to":[13,32,62,122],"automate":[14],"synthesis":[16],"radio-frequency":[18],"(RF)":[19],"integrated":[20,50],"circuit":[21,109,126,136],"blocks":[22],"is":[23,54,65],"presented.":[24],"light":[27],"analysis,":[30],"and":[31,38,80,119],"avoid":[33],"nonsystematic":[34],"iterations":[35],"between":[36],"sizing":[37,46,71,148],"layout":[39,58,120,127],"design":[40,52,100,104,157],"steps,":[41],"a":[42,133],"multiobjective":[43],"optimization-based":[44],"layout-aware":[45,147],"approach":[47,90],"with":[48,84],"preoptimized":[49,85],"inductor(s)":[51],"space":[53],"proposed.":[55],"An":[56],"automatic":[57],"generation":[59],"from":[60,150],"netlist":[61],"ready-to-fabricate":[63],"prototype":[64],"carried":[66],"in-the-loop":[67],"for":[68,102,116],"each":[69],"tentative":[70],"solution":[72],"using":[73],"RF-specific":[75],"module":[76],"generator,":[77],"template-based":[78],"placer":[79],"evolutionary":[81],"multinet":[82],"router":[83],"interconnect":[86],"widths.":[87],"The":[88],"exploits":[91],"full":[93],"capabilities":[94],"most":[97],"established":[98],"computer-aided":[99],"tools":[101],"RF":[103,108,139],"available":[105],"nowadays,":[106],"i.e.,":[107],"simulator":[110,115],"as":[111],"performance":[112],"evaluator,":[113],"electromagnetic":[114],"inductor":[117],"characterization,":[118],"extractor":[121],"determine":[123],"complete":[125,146],"parasitics.":[128],"Experiments":[129],"are":[130],"conducted":[131],"over":[132],"widely":[134],"used":[135],"context,":[140],"showing":[141],"advantages":[143],"performing":[145],"optimization":[149],"very":[152],"initial":[153],"stages":[154],"process.":[158]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":6},{"year":2022,"cited_by_count":5},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":7},{"year":2019,"cited_by_count":12},{"year":2018,"cited_by_count":1}],"updated_date":"2026-03-27T05:58:40.876381","created_date":"2025-10-10T00:00:00"}