{"id":"https://openalex.org/W2508369770","doi":"https://doi.org/10.1109/tcad.2016.2602806","title":"SoC Speed Binning Using Machine Learning and On-Chip Slack Sensors","display_name":"SoC Speed Binning Using Machine Learning and On-Chip Slack Sensors","publication_year":2016,"publication_date":"2016-08-25","ids":{"openalex":"https://openalex.org/W2508369770","doi":"https://doi.org/10.1109/tcad.2016.2602806","mag":"2508369770"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2016.2602806","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2016.2602806","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"Mehdi Sadi","orcid":"https://orcid.org/0000-0002-9820-3695"},"institutions":[{"id":"https://openalex.org/I33213144","display_name":"University of Florida","ror":"https://ror.org/02y3ad647","country_code":"US","type":"education","lineage":["https://openalex.org/I33213144"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mehdi Sadi","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Florida, Gainesville, FL, USA"],"raw_orcid":"https://orcid.org/0000-0002-9820-3695","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Florida, Gainesville, FL, USA","institution_ids":["https://openalex.org/I33213144"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5016961561","display_name":"Sukeshwar Kannan","orcid":"https://orcid.org/0000-0003-4107-2126"},"institutions":[{"id":"https://openalex.org/I35662394","display_name":"GlobalFoundries (United States)","ror":"https://ror.org/02h0ps145","country_code":"US","type":"company","lineage":["https://openalex.org/I35662394"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sukeshwar Kannan","raw_affiliation_strings":["GLOBALFOUNDRIES, Malta, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"GLOBALFOUNDRIES, Malta, NY, USA","institution_ids":["https://openalex.org/I35662394"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5084205383","display_name":"LeRoy Winemberg","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"LeRoy Winemberg","raw_affiliation_strings":["NXP Semiconductors, Austin, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"NXP Semiconductors, Austin, TX, USA","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5102766705","display_name":"Mark Tehranipoor","orcid":"https://orcid.org/0009-0006-8410-2347"},"institutions":[{"id":"https://openalex.org/I33213144","display_name":"University of Florida","ror":"https://ror.org/02y3ad647","country_code":"US","type":"education","lineage":["https://openalex.org/I33213144"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mark Tehranipoor","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Florida, Gainesville, FL, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Florida, Gainesville, FL, USA","institution_ids":["https://openalex.org/I33213144"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":2645,"currency":"USD","value_usd":2645},"apc_paid":null,"fwci":1.3254,"has_fulltext":false,"cited_by_count":26,"citation_normalized_percentile":{"value":0.82645467,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"36","issue":"5","first_page":"842","last_page":"854"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5752869844436646},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.558039128780365},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.49434328079223633},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.47022032737731934},{"id":"https://openalex.org/keywords/test-set","display_name":"Test set","score":0.45181161165237427},{"id":"https://openalex.org/keywords/sort","display_name":"sort","score":0.43323689699172974},{"id":"https://openalex.org/keywords/workload","display_name":"Workload","score":0.42831140756607056},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4058550298213959},{"id":"https://openalex.org/keywords/machine-learning","display_name":"Machine learning","score":0.34671521186828613},{"id":"https://openalex.org/keywords/information-retrieval","display_name":"Information retrieval","score":0.09842336177825928}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5752869844436646},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.558039128780365},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.49434328079223633},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.47022032737731934},{"id":"https://openalex.org/C169903167","wikidata":"https://www.wikidata.org/wiki/Q3985153","display_name":"Test set","level":2,"score":0.45181161165237427},{"id":"https://openalex.org/C88548561","wikidata":"https://www.wikidata.org/wiki/Q347599","display_name":"sort","level":2,"score":0.43323689699172974},{"id":"https://openalex.org/C2778476105","wikidata":"https://www.wikidata.org/wiki/Q628539","display_name":"Workload","level":2,"score":0.42831140756607056},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4058550298213959},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.34671521186828613},{"id":"https://openalex.org/C23123220","wikidata":"https://www.wikidata.org/wiki/Q816826","display_name":"Information retrieval","level":1,"score":0.09842336177825928},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.2016.2602806","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2016.2602806","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G4778709135","display_name":"A Multi-Level Test Approach for Improving Reliability and Performance of Nanometer Technology Designs","funder_award_id":"1565404","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320306087","display_name":"Semiconductor Research Corporation","ror":"https://ror.org/047z4n946"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":41,"referenced_works":["https://openalex.org/W1588401315","https://openalex.org/W1595368737","https://openalex.org/W1605172130","https://openalex.org/W1676820704","https://openalex.org/W1968133083","https://openalex.org/W1973466669","https://openalex.org/W1973688898","https://openalex.org/W2008396243","https://openalex.org/W2013936189","https://openalex.org/W2035787834","https://openalex.org/W2044647950","https://openalex.org/W2072546947","https://openalex.org/W2073863528","https://openalex.org/W2082557039","https://openalex.org/W2095665333","https://openalex.org/W2106315190","https://openalex.org/W2106525823","https://openalex.org/W2109943925","https://openalex.org/W2112076978","https://openalex.org/W2119616711","https://openalex.org/W2127745713","https://openalex.org/W2139158434","https://openalex.org/W2139315617","https://openalex.org/W2155452708","https://openalex.org/W2156809047","https://openalex.org/W2164754947","https://openalex.org/W2167253897","https://openalex.org/W2331454827","https://openalex.org/W2337040835","https://openalex.org/W2341693243","https://openalex.org/W2568042497","https://openalex.org/W2911964244","https://openalex.org/W2998216295","https://openalex.org/W2998768810","https://openalex.org/W4212883601","https://openalex.org/W4245551630","https://openalex.org/W4285719527","https://openalex.org/W6635310694","https://openalex.org/W6676079928","https://openalex.org/W6676769703","https://openalex.org/W7066667914"],"related_works":["https://openalex.org/W2000785801","https://openalex.org/W986318368","https://openalex.org/W2378211422","https://openalex.org/W2384410913","https://openalex.org/W2352878646","https://openalex.org/W2004734601","https://openalex.org/W2130149817","https://openalex.org/W2990194547","https://openalex.org/W1480123525","https://openalex.org/W2620865396"],"abstract_inverted_index":{"Speed":[0],"binning":[1,19,49],"of":[2,11,26,63,86,123,131],"system-on-chips":[3],"(SoCs)":[4],"using":[5],"conventional":[6],"Fmax":[7],"test":[8,14,33,39],"requires":[9],"application":[10],"complex":[12],"functional":[13,32],"patterns.":[15],"Functional":[16],"workload-based":[17],"speed":[18,48],"techniques":[20,71],"incur":[21],"high":[22],"test-cost":[23],"in":[24,31,111],"terms":[25],"long":[27],"test-time":[28],"and":[29,35,80],"complexity":[30],"generation,":[34],"require":[36],"high-end":[37],"automatic":[38],"equipment.":[40],"In":[41],"this":[42],"paper,":[43],"we":[44],"propose":[45],"a":[46,74,84],"novel":[47],"flow":[50,107],"that":[51],"uses":[52],"path":[53],"timing":[54],"slacks,":[55],"extracted":[56,78],"with":[57],"robust":[58],"digital":[59],"embedded":[60],"sensor":[61],"IPs,":[62],"selected":[64],"critical/nearcritical":[65],"paths.":[66],"We":[67],"apply":[68],"machine":[69],"learning":[70],"to":[72,98],"model":[73],"predictor":[75,95],"considering":[76],"the":[77,81,100,102,132],"slacks":[79],"Fmaxvalues":[82],"from":[83],"set":[85],"randomly":[87],"tested":[88],"die":[89],"during":[90],"wafer":[91],"sort.":[92],"The":[93,105],"trained":[94],"is":[96],"used":[97],"obtain":[99],"Fmaxfor":[101],"remaining":[103],"chips.":[104],"proposed":[106],"has":[108],"been":[109],"demonstrated":[110],"an":[112],"SoC":[113],"benchmark":[114],"circuit":[115],"at":[116],"28":[117],"nm":[118],"technology.":[119],"For":[120],"sufficient":[121],"number":[122],"training":[124],"samples,":[125],"Fmaxis":[126],"correctly":[127],"predicted":[128],"for":[129],"99%":[130],"prediction":[133],"samples.":[134]},"counts_by_year":[{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":4},{"year":2023,"cited_by_count":6},{"year":2022,"cited_by_count":4},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1}],"updated_date":"2026-08-21T09:56:20.448147","created_date":"2025-10-10T00:00:00"}