{"id":"https://openalex.org/W2485163885","doi":"https://doi.org/10.1109/tcad.2016.2597215","title":"Clock-Gating of Streaming Applications for Energy Efficient Implementations on FPGAs","display_name":"Clock-Gating of Streaming Applications for Energy Efficient Implementations on FPGAs","publication_year":2016,"publication_date":"2016-08-02","ids":{"openalex":"https://openalex.org/W2485163885","doi":"https://doi.org/10.1109/tcad.2016.2597215","mag":"2485163885"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2016.2597215","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2016.2597215","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://infoscience.epfl.ch/record/228794","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5033404153","display_name":"Endri Bezati","orcid":"https://orcid.org/0000-0003-3446-9838"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":true,"raw_author_name":"Endri Bezati","raw_affiliation_strings":["Laboratory SCI-STI-MM, \u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne, Lausanne, Switzerland"],"affiliations":[{"raw_affiliation_string":"Laboratory SCI-STI-MM, \u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne, Lausanne, Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043848377","display_name":"Simone Casale-Brunet","orcid":"https://orcid.org/0000-0001-7840-1398"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Simone Casale-Brunet","raw_affiliation_strings":["Laboratory SCI-STI-MM, \u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne, Lausanne, Switzerland"],"affiliations":[{"raw_affiliation_string":"Laboratory SCI-STI-MM, \u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne, Lausanne, Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013188524","display_name":"Marco Mattavelli","orcid":"https://orcid.org/0000-0002-7742-0332"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Marco Mattavelli","raw_affiliation_strings":["Laboratory SCI-STI-MM, \u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne, Lausanne, Switzerland"],"affiliations":[{"raw_affiliation_string":"Laboratory SCI-STI-MM, \u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne, Lausanne, Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5065449878","display_name":"J\u00f6rn W. Janneck","orcid":null},"institutions":[{"id":"https://openalex.org/I187531555","display_name":"Lund University","ror":"https://ror.org/012a77v79","country_code":"SE","type":"education","lineage":["https://openalex.org/I187531555"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"Jorn W. Janneck","raw_affiliation_strings":["Department of Computer Science, Lund University, Lund, Sweden"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Lund University, Lund, Sweden","institution_ids":["https://openalex.org/I187531555"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5033404153"],"corresponding_institution_ids":["https://openalex.org/I5124864"],"apc_list":null,"apc_paid":null,"fwci":1.9301,"has_fulltext":false,"cited_by_count":27,"citation_normalized_percentile":{"value":0.85234899,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"36","issue":"4","first_page":"699","last_page":"703"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8220583200454712},{"id":"https://openalex.org/keywords/dataflow","display_name":"Dataflow","score":0.8180391788482666},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.5864493250846863},{"id":"https://openalex.org/keywords/clock-gating","display_name":"Clock gating","score":0.542726457118988},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.49187326431274414},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.44091635942459106},{"id":"https://openalex.org/keywords/packet-processing","display_name":"Packet processing","score":0.4295646846294403},{"id":"https://openalex.org/keywords/dynamic-demand","display_name":"Dynamic demand","score":0.42074042558670044},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4068329930305481},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.37339240312576294},{"id":"https://openalex.org/keywords/network-packet","display_name":"Network packet","score":0.34644824266433716},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.23158642649650574},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.22858133912086487},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.2202128767967224},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.2008916735649109},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.17536121606826782},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.12284892797470093}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8220583200454712},{"id":"https://openalex.org/C96324660","wikidata":"https://www.wikidata.org/wiki/Q205446","display_name":"Dataflow","level":2,"score":0.8180391788482666},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.5864493250846863},{"id":"https://openalex.org/C22716491","wikidata":"https://www.wikidata.org/wiki/Q590170","display_name":"Clock gating","level":5,"score":0.542726457118988},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.49187326431274414},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.44091635942459106},{"id":"https://openalex.org/C2779581428","wikidata":"https://www.wikidata.org/wiki/Q7122997","display_name":"Packet processing","level":3,"score":0.4295646846294403},{"id":"https://openalex.org/C45872418","wikidata":"https://www.wikidata.org/wiki/Q5318966","display_name":"Dynamic demand","level":3,"score":0.42074042558670044},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4068329930305481},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.37339240312576294},{"id":"https://openalex.org/C158379750","wikidata":"https://www.wikidata.org/wiki/Q214111","display_name":"Network packet","level":2,"score":0.34644824266433716},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.23158642649650574},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.22858133912086487},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.2202128767967224},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.2008916735649109},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.17536121606826782},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.12284892797470093},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.0}],"mesh":[],"locations_count":4,"locations":[{"id":"doi:10.1109/tcad.2016.2597215","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2016.2597215","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},{"id":"pmh:oai:infoscience.epfl.ch:228794","is_oa":true,"landing_page_url":"http://infoscience.epfl.ch/record/228794","pdf_url":null,"source":{"id":"https://openalex.org/S4306400487","display_name":"Infoscience (Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Text"},{"id":"pmh:oai:infoscience.epfl.ch:253563","is_oa":true,"landing_page_url":"http://infoscience.epfl.ch/record/253563","pdf_url":null,"source":{"id":"https://openalex.org/S4306400487","display_name":"Infoscience (Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://infoscience.epfl.ch/record/253563","raw_type":"Text"},{"id":"pmh:oai:lup.lub.lu.se:610f14fb-564f-4981-b260-515c6623988d","is_oa":false,"landing_page_url":"https://lup.lub.lu.se/record/610f14fb-564f-4981-b260-515c6623988d","pdf_url":null,"source":{"id":"https://openalex.org/S4306400536","display_name":"Lund University Publications (Lund University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I187531555","host_organization_name":"Lund University","host_organization_lineage":["https://openalex.org/I187531555"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"ISSN: 0278-0070","raw_type":"text"}],"best_oa_location":{"id":"pmh:oai:infoscience.epfl.ch:228794","is_oa":true,"landing_page_url":"http://infoscience.epfl.ch/record/228794","pdf_url":null,"source":{"id":"https://openalex.org/S4306400487","display_name":"Infoscience (Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Text"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8999999761581421,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W1530844285","https://openalex.org/W1538214387","https://openalex.org/W1597755753","https://openalex.org/W2013197471","https://openalex.org/W2026305054","https://openalex.org/W2043165230","https://openalex.org/W2046026558","https://openalex.org/W2079170559","https://openalex.org/W2114489587","https://openalex.org/W2120431055","https://openalex.org/W2126770847","https://openalex.org/W2127044011","https://openalex.org/W2128401479","https://openalex.org/W2137310043","https://openalex.org/W2203104251","https://openalex.org/W4247576025","https://openalex.org/W6631713136","https://openalex.org/W6635964534","https://openalex.org/W6678909112"],"related_works":["https://openalex.org/W2539473121","https://openalex.org/W2960456644","https://openalex.org/W4252084893","https://openalex.org/W2485892467","https://openalex.org/W1972953980","https://openalex.org/W1510566755","https://openalex.org/W1984520783","https://openalex.org/W1976346464","https://openalex.org/W2617348361","https://openalex.org/W2152979262"],"abstract_inverted_index":{"This":[0,48],"paper":[1,49],"investigates":[2],"the":[3,57,73,85,88,101],"reduction":[4],"of":[5,28,53,61,72,87,104,112],"dynamic":[6,58],"power":[7,65,122],"for":[8],"streaming":[9,59],"applications":[10,22,114],"yielded":[11],"by":[12,16,67],"asynchronous":[13],"dataflow":[14,107],"designs":[15],"using":[17],"clock":[18],"gating":[19],"techniques.":[20],"Streaming":[21],"constitute":[23],"a":[24,51,105],"very":[25],"broad":[26],"class":[27],"computing":[29],"algorithms":[30],"in":[31,128],"areas":[32],"such":[33],"as":[34],"signal":[35],"processing,":[36,46],"digital":[37],"media":[38],"coding,":[39],"cryptography,":[40],"video":[41],"analytics,":[42],"network":[43],"routing,":[44],"packet":[45],"etc.":[47],"introduces":[50],"set":[52],"techniques":[54,81],"that,":[55],"considering":[56],"behavior":[60],"algorithms,":[62],"can":[63,90,97],"achieve":[64],"savings":[66],"selectively":[68],"switching":[69],"off":[70],"parts":[71],"circuits":[74],"when":[75],"they":[76],"are":[77],"temporarily":[78],"inactive.":[79],"The":[80],"being":[82],"independent":[83],"from":[84],"semantic":[86],"application":[89,95],"be":[91,98],"applied":[92],"to":[93],"any":[94],"and":[96],"integrated":[99],"into":[100],"synthesis":[102],"stage":[103],"high-level":[106],"design":[108],"flow.":[109],"Experimental":[110],"results":[111],"at-size":[113],"synthesized":[115],"on":[116],"field-programmable":[117],"gate":[118],"arrays":[119],"platforms":[120],"demonstrate":[121],"reductions":[123],"achievable":[124],"with":[125],"no":[126],"loss":[127],"data":[129],"throughput.":[130]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":4},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":6},{"year":2020,"cited_by_count":5},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":2}],"updated_date":"2026-03-10T16:38:18.471706","created_date":"2025-10-10T00:00:00"}