{"id":"https://openalex.org/W2503133248","doi":"https://doi.org/10.1109/tcad.2016.2597214","title":"Star-EDT: Deterministic On-Chip Scheme Using Compressed Test Patterns","display_name":"Star-EDT: Deterministic On-Chip Scheme Using Compressed Test Patterns","publication_year":2016,"publication_date":"2016-08-02","ids":{"openalex":"https://openalex.org/W2503133248","doi":"https://doi.org/10.1109/tcad.2016.2597214","mag":"2503133248"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2016.2597214","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2016.2597214","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5046691899","display_name":"Grzegorz Mrugalski","orcid":"https://orcid.org/0000-0001-9378-127X"},"institutions":[{"id":"https://openalex.org/I4210156212","display_name":"Mentor Technologies","ror":"https://ror.org/05vewsj04","country_code":"US","type":"other","lineage":["https://openalex.org/I4210156212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Grzegorz Mrugalski","raw_affiliation_strings":["Mentor Graphics Corporation, Wilsonville, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Mentor Graphics Corporation, Wilsonville, OR, USA","institution_ids":["https://openalex.org/I4210156212"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5080960636","display_name":"Janusz Rajski","orcid":"https://orcid.org/0000-0003-2124-447X"},"institutions":[{"id":"https://openalex.org/I4210156212","display_name":"Mentor Technologies","ror":"https://ror.org/05vewsj04","country_code":"US","type":"other","lineage":["https://openalex.org/I4210156212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Janusz Rajski","raw_affiliation_strings":["Mentor Graphics Corporation, Wilsonville, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Mentor Graphics Corporation, Wilsonville, OR, USA","institution_ids":["https://openalex.org/I4210156212"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043855046","display_name":"Lukasz Rybak","orcid":"https://orcid.org/0000-0001-6219-358X"},"institutions":[{"id":"https://openalex.org/I4210156212","display_name":"Mentor Technologies","ror":"https://ror.org/05vewsj04","country_code":"US","type":"other","lineage":["https://openalex.org/I4210156212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Lukasz Rybak","raw_affiliation_strings":["Mentor Graphics Corporation, Wilsonville, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Mentor Graphics Corporation, Wilsonville, OR, USA","institution_ids":["https://openalex.org/I4210156212"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002725206","display_name":"J\u0119drzej Solecki","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156212","display_name":"Mentor Technologies","ror":"https://ror.org/05vewsj04","country_code":"US","type":"other","lineage":["https://openalex.org/I4210156212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jedrzej Solecki","raw_affiliation_strings":["Mentor Graphics Corporation, Wilsonville, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Mentor Graphics Corporation, Wilsonville, OR, USA","institution_ids":["https://openalex.org/I4210156212"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5072675590","display_name":"Jerzy Tyszer","orcid":"https://orcid.org/0000-0001-9722-2344"},"institutions":[{"id":"https://openalex.org/I46597724","display_name":"Pozna\u0144 University of Technology","ror":"https://ror.org/00p7p3302","country_code":"PL","type":"education","lineage":["https://openalex.org/I46597724"]}],"countries":["PL"],"is_corresponding":false,"raw_author_name":"Jerzy Tyszer","raw_affiliation_strings":["Faculty of Electronics and Telecommunications, Poznan University of Technology, Poznan, Poland"],"raw_orcid":"https://orcid.org/0000-0001-9722-2344","affiliations":[{"raw_affiliation_string":"Faculty of Electronics and Telecommunications, Poznan University of Technology, Poznan, Poland","institution_ids":["https://openalex.org/I46597724"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.9614,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.74085532,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"36","issue":"4","first_page":"683","last_page":"693"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9871000051498413,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.838089108467102},{"id":"https://openalex.org/keywords/star","display_name":"Star (game theory)","score":0.7849591374397278},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.6466604471206665},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6310908794403076},{"id":"https://openalex.org/keywords/test-compression","display_name":"Test compression","score":0.6250718832015991},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.6080796122550964},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5245697498321533},{"id":"https://openalex.org/keywords/compression","display_name":"Compression (physics)","score":0.5204291939735413},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5145570635795593},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.47575920820236206},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.46088099479675293},{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.4580823481082916},{"id":"https://openalex.org/keywords/simple","display_name":"Simple (philosophy)","score":0.4100704491138458},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.37320321798324585},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.3328813314437866},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.24726340174674988},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.22346541285514832},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.20967552065849304},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14705827832221985},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.0839565098285675}],"concepts":[{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.838089108467102},{"id":"https://openalex.org/C2780897414","wikidata":"https://www.wikidata.org/wiki/Q7600592","display_name":"Star (game theory)","level":2,"score":0.7849591374397278},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.6466604471206665},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6310908794403076},{"id":"https://openalex.org/C29652920","wikidata":"https://www.wikidata.org/wiki/Q7705757","display_name":"Test compression","level":4,"score":0.6250718832015991},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.6080796122550964},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5245697498321533},{"id":"https://openalex.org/C180016635","wikidata":"https://www.wikidata.org/wiki/Q2712821","display_name":"Compression (physics)","level":2,"score":0.5204291939735413},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5145570635795593},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.47575920820236206},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.46088099479675293},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.4580823481082916},{"id":"https://openalex.org/C2780586882","wikidata":"https://www.wikidata.org/wiki/Q7520643","display_name":"Simple (philosophy)","level":2,"score":0.4100704491138458},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.37320321798324585},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3328813314437866},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.24726340174674988},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.22346541285514832},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.20967552065849304},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14705827832221985},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0839565098285675},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C159985019","wikidata":"https://www.wikidata.org/wiki/Q181790","display_name":"Composite material","level":1,"score":0.0},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.2016.2597214","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2016.2597214","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Life below water","score":0.6899999976158142,"id":"https://metadata.un.org/sdg/14"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":55,"referenced_works":["https://openalex.org/W1517139843","https://openalex.org/W1562494186","https://openalex.org/W1562699972","https://openalex.org/W1590110141","https://openalex.org/W1904382567","https://openalex.org/W1934808766","https://openalex.org/W1969318341","https://openalex.org/W2016172736","https://openalex.org/W2018796127","https://openalex.org/W2024212907","https://openalex.org/W2034294653","https://openalex.org/W2069493778","https://openalex.org/W2078640572","https://openalex.org/W2093547453","https://openalex.org/W2096667381","https://openalex.org/W2096852695","https://openalex.org/W2097270518","https://openalex.org/W2097973512","https://openalex.org/W2101900253","https://openalex.org/W2102404182","https://openalex.org/W2103706706","https://openalex.org/W2104107023","https://openalex.org/W2104856486","https://openalex.org/W2108500347","https://openalex.org/W2109043970","https://openalex.org/W2114980975","https://openalex.org/W2117154146","https://openalex.org/W2118968259","https://openalex.org/W2122983144","https://openalex.org/W2125785026","https://openalex.org/W2127343408","https://openalex.org/W2128283796","https://openalex.org/W2133288230","https://openalex.org/W2133610003","https://openalex.org/W2135627440","https://openalex.org/W2137460337","https://openalex.org/W2137549092","https://openalex.org/W2137650995","https://openalex.org/W2138530143","https://openalex.org/W2140283778","https://openalex.org/W2144033909","https://openalex.org/W2148086802","https://openalex.org/W2150369175","https://openalex.org/W2150895785","https://openalex.org/W2153662495","https://openalex.org/W2163575144","https://openalex.org/W2164418022","https://openalex.org/W2166142919","https://openalex.org/W2169451209","https://openalex.org/W2182814350","https://openalex.org/W4246972245","https://openalex.org/W4256404229","https://openalex.org/W6631122638","https://openalex.org/W6640744092","https://openalex.org/W6681008240"],"related_works":["https://openalex.org/W2786111245","https://openalex.org/W3009953521","https://openalex.org/W4285708951","https://openalex.org/W1991935474","https://openalex.org/W2021253405","https://openalex.org/W2323083271","https://openalex.org/W2091533492","https://openalex.org/W2802691720","https://openalex.org/W2940545572","https://openalex.org/W2154529098"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"Star-EDT-a":[3],"novel":[4],"deterministic":[5,115,136],"test":[6,29,61,104,116],"compression":[7,16,80],"scheme.":[8],"The":[9,76],"proposed":[10,114],"solution":[11],"seamlessly":[12],"integrates":[13],"with":[14,37,99],"EDT-based":[15],"and":[17,44,51,118],"takes":[18],"advantage":[19],"of":[20,28,56,59,103,107,112,135],"two":[21],"key":[22],"observations:":[23],"1)":[24],"there":[25],"exist":[26],"clusters":[27],"vectors":[30],"that":[31,126],"can":[32,129],"detect":[33],"many":[34],"random-resistant":[35],"faults":[36],"a":[38,41,53,67,72,100,132],"cluster":[39],"comprising":[40],"parent":[42],"pattern":[43],"its":[45],"derivatives":[46],"obtained":[47,92],"through":[48,86],"simple":[49],"transformations":[50],"2)":[52],"significant":[54],"majority":[55],"specified":[57],"positions":[58],"ATPG-produced":[60],"cubes":[62],"are":[63,119],"typically":[64,84],"clustered":[65],"within":[66],"single":[68],"or,":[69],"at":[70],"most,":[71],"few":[73],"scan":[74],"chains.":[75],"Star-EDT":[77,128],"approach":[78],"elevates":[79],"ratios":[81],"to":[82],"values":[83],"unachievable":[85],"conventional":[87],"reseeding-based":[88],"solutions.":[89],"Experimental":[90],"results":[91],"for":[93],"large":[94],"industrial":[95],"designs,":[96],"including":[97],"those":[98],"new":[101],"class":[102],"points":[105],"aware":[106],"ATPG-induced":[108],"conflicts,":[109],"illustrate":[110],"feasibility":[111],"the":[113,127],"scheme":[117],"reported":[120],"herein.":[121],"In":[122],"particular,":[123],"they":[124],"confirm":[125],"act":[130],"as":[131],"valuable":[133],"form":[134],"BIST.":[137]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":2},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
