{"id":"https://openalex.org/W2343845377","doi":"https://doi.org/10.1109/tcad.2016.2525798","title":"Feature Indented Assertions for Analog and Mixed-Signal Validation","display_name":"Feature Indented Assertions for Analog and Mixed-Signal Validation","publication_year":2016,"publication_date":"2016-02-04","ids":{"openalex":"https://openalex.org/W2343845377","doi":"https://doi.org/10.1109/tcad.2016.2525798","mag":"2343845377"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2016.2525798","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2016.2525798","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5054387622","display_name":"Antara Ain","orcid":"https://orcid.org/0000-0003-3371-6518"},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Antara Ain","raw_affiliation_strings":["Advanced Technology Development Centre, Indian Institute of Technology Kharagpur, Kharagpur, India","Advanced Technology Development Centre, Indian Institute of Technology, Kharagpur Kharagpur, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Advanced Technology Development Centre, Indian Institute of Technology Kharagpur, Kharagpur, India","institution_ids":["https://openalex.org/I145894827"]},{"raw_affiliation_string":"Advanced Technology Development Centre, Indian Institute of Technology, Kharagpur Kharagpur, India","institution_ids":["https://openalex.org/I145894827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037758878","display_name":"Antonio Anastasio Bruto da Costa","orcid":"https://orcid.org/0000-0002-4590-0665"},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Antonio Anastasio Bruto da Costa","raw_affiliation_strings":["Department of Computer Science and Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India","Department of Computer Science and Engineering, Indian Institute of Technology, Kharagpur, Kharagpur, India#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India","institution_ids":["https://openalex.org/I145894827"]},{"raw_affiliation_string":"Department of Computer Science and Engineering, Indian Institute of Technology, Kharagpur, Kharagpur, India#TAB#","institution_ids":["https://openalex.org/I145894827"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5033329960","display_name":"Pallab Dasgupta","orcid":"https://orcid.org/0000-0002-2178-8154"},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Pallab Dasgupta","raw_affiliation_strings":["Department of Computer Science and Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India","Department of Computer Science and Engineering, Indian Institute of Technology, Kharagpur, Kharagpur, India#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, Indian Institute of Technology Kharagpur, Kharagpur, India","institution_ids":["https://openalex.org/I145894827"]},{"raw_affiliation_string":"Department of Computer Science and Engineering, Indian Institute of Technology, Kharagpur, Kharagpur, India#TAB#","institution_ids":["https://openalex.org/I145894827"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":3.8455,"has_fulltext":false,"cited_by_count":22,"citation_normalized_percentile":{"value":0.93266606,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"35","issue":"11","first_page":"1928","last_page":"1941"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7157667875289917},{"id":"https://openalex.org/keywords/feature","display_name":"Feature (linguistics)","score":0.7101209163665771},{"id":"https://openalex.org/keywords/correctness","display_name":"Correctness","score":0.5624409914016724},{"id":"https://openalex.org/keywords/mathematical-proof","display_name":"Mathematical proof","score":0.4977777302265167},{"id":"https://openalex.org/keywords/margin","display_name":"Margin (machine learning)","score":0.4811179041862488},{"id":"https://openalex.org/keywords/integrator","display_name":"Integrator","score":0.4758684039115906},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.4424195885658264},{"id":"https://openalex.org/keywords/syntax","display_name":"Syntax","score":0.43789204955101013},{"id":"https://openalex.org/keywords/semantics","display_name":"Semantics (computer science)","score":0.43037131428718567},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.403708279132843},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.38524433970451355},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.3851718306541443},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.3379732370376587},{"id":"https://openalex.org/keywords/pattern-recognition","display_name":"Pattern recognition (psychology)","score":0.3276437222957611},{"id":"https://openalex.org/keywords/machine-learning","display_name":"Machine learning","score":0.17610162496566772},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.14539098739624023}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7157667875289917},{"id":"https://openalex.org/C2776401178","wikidata":"https://www.wikidata.org/wiki/Q12050496","display_name":"Feature (linguistics)","level":2,"score":0.7101209163665771},{"id":"https://openalex.org/C55439883","wikidata":"https://www.wikidata.org/wiki/Q360812","display_name":"Correctness","level":2,"score":0.5624409914016724},{"id":"https://openalex.org/C108710211","wikidata":"https://www.wikidata.org/wiki/Q11538","display_name":"Mathematical proof","level":2,"score":0.4977777302265167},{"id":"https://openalex.org/C774472","wikidata":"https://www.wikidata.org/wiki/Q6760393","display_name":"Margin (machine learning)","level":2,"score":0.4811179041862488},{"id":"https://openalex.org/C79518650","wikidata":"https://www.wikidata.org/wiki/Q2081431","display_name":"Integrator","level":3,"score":0.4758684039115906},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.4424195885658264},{"id":"https://openalex.org/C60048249","wikidata":"https://www.wikidata.org/wiki/Q37437","display_name":"Syntax","level":2,"score":0.43789204955101013},{"id":"https://openalex.org/C184337299","wikidata":"https://www.wikidata.org/wiki/Q1437428","display_name":"Semantics (computer science)","level":2,"score":0.43037131428718567},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.403708279132843},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.38524433970451355},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.3851718306541443},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.3379732370376587},{"id":"https://openalex.org/C153180895","wikidata":"https://www.wikidata.org/wiki/Q7148389","display_name":"Pattern recognition (psychology)","level":2,"score":0.3276437222957611},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.17610162496566772},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.14539098739624023},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.2016.2525798","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2016.2525798","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G407123486","display_name":null,"funder_award_id":"2012-TJ-2267","funder_id":"https://openalex.org/F4320306087","funder_display_name":"Semiconductor Research Corporation"}],"funders":[{"id":"https://openalex.org/F4320306087","display_name":"Semiconductor Research Corporation","ror":"https://ror.org/047z4n946"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W566385658","https://openalex.org/W1483606732","https://openalex.org/W1500337659","https://openalex.org/W1547304883","https://openalex.org/W1964164497","https://openalex.org/W1972085901","https://openalex.org/W1977363041","https://openalex.org/W1991079660","https://openalex.org/W1992263355","https://openalex.org/W2016719768","https://openalex.org/W2023808162","https://openalex.org/W2049696538","https://openalex.org/W2051874670","https://openalex.org/W2070939580","https://openalex.org/W2091292637","https://openalex.org/W2140017391","https://openalex.org/W2172085120","https://openalex.org/W3150324509","https://openalex.org/W4229976411","https://openalex.org/W6629976000"],"related_works":["https://openalex.org/W3008339103","https://openalex.org/W2404647514","https://openalex.org/W1667647204","https://openalex.org/W4247536566","https://openalex.org/W3119814709","https://openalex.org/W2018477250","https://openalex.org/W1508895727","https://openalex.org/W2366352762","https://openalex.org/W2613964090","https://openalex.org/W55831818"],"abstract_inverted_index":{"The":[0],"acceptance":[1,72],"criteria":[2],"for":[3,101,175],"analog":[4,42],"designs":[5,46],"are":[6,27,67],"traditionally":[7],"defined":[8,14],"in":[9,79],"terms":[10],"of":[11,29,32,41,69,96,105,112,125,138,166,191],"real-valued":[12,106],"features":[13,28,54,107,160,177],"over":[15,108,161,178,196],"behavioral":[16],"responses.":[17],"For":[18],"example,":[19],"rise":[20],"time,":[21],"peak":[22],"overshoot,":[23],"and":[24,43,60,123,129,158,181,193],"settling":[25],"time":[26,180],"the":[30,52,71,87,90,94,103,109,120,164],"response":[31],"a":[33,37,135],"second-order":[34],"system":[35],"under":[36],"step":[38],"input.":[39],"Designers":[40],"mixed-signal":[44],"(AMS)":[45],"typically":[47],"like":[48],"to":[49,133],"see":[50],"whether":[51],"relevant":[53],"lie":[55],"within":[56],"their":[57],"specified":[58],"ranges,":[59],"if":[61],"so,":[62],"by":[63,84],"what":[64,85],"margin.":[65],"Assertions":[66,99],"capable":[68],"capturing":[70],"criteria,":[73],"but":[74],"they":[75],"do":[76],"not":[77],"help":[78],"evaluating":[80],"how":[81],"well":[82],"(or":[83],"margin)":[86],"design":[88],"satisfies":[89],"specification.":[91],"We":[92,141],"introduce":[93],"notion":[95],"Feature":[97],"Indented":[98],"(FIAs)":[100],"overlaying":[102],"definition":[104],"syntactic":[110],"fabric":[111],"AMS":[113,139,152],"assertions.":[114],"In":[115],"this":[116,167],"paper,":[117],"we":[118,169],"present":[119,142],"formal":[121],"syntax":[122],"semantics":[124],"our":[126,143,171],"language,":[127],"FIA,":[128],"demonstrate":[130],"its":[131],"ability":[132],"capture":[134],"wide":[136],"variety":[137],"features.":[140],"dynamic":[144],"feature":[145],"evaluation":[146],"tool":[147],"that":[148],"plugs":[149],"into":[150],"standard":[151],"simulators":[153],"through":[154],"Verilog":[155],"Procedural":[156],"Interfaces":[157],"evaluates":[159],"simulation.":[162],"At":[163],"heart":[165],"tool,":[168],"have":[170],"interval":[172],"arithmetic-based":[173],"algorithm":[174,185],"monitoring":[176],"continuous":[179],"value":[182],"domains.":[183],"This":[184],"is":[186],"presented":[187],"with":[188,194],"corresponding":[189],"proofs":[190],"correctness":[192],"results":[195],"industrial":[197],"testcases.":[198]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":4},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":4},{"year":2017,"cited_by_count":5},{"year":2016,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
