{"id":"https://openalex.org/W2343593014","doi":"https://doi.org/10.1109/tcad.2015.2501295","title":"DeMixGen: Deterministic Mixed-Signal Layout Generation With Separated Analog and Digital Signal Paths","display_name":"DeMixGen: Deterministic Mixed-Signal Layout Generation With Separated Analog and Digital Signal Paths","publication_year":2015,"publication_date":"2015-12-04","ids":{"openalex":"https://openalex.org/W2343593014","doi":"https://doi.org/10.1109/tcad.2015.2501295","mag":"2343593014"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2015.2501295","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2015.2501295","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5020643571","display_name":"Mark Po-Hung Lin","orcid":"https://orcid.org/0000-0003-2292-2308"},"institutions":[{"id":"https://openalex.org/I148099254","display_name":"National Chung Cheng University","ror":"https://ror.org/0028v3876","country_code":"TW","type":"education","lineage":["https://openalex.org/I148099254"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Mark Po-Hung Lin","raw_affiliation_strings":["Department of Electrical Engineering, National Chung Cheng University, Chiayi, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Chung Cheng University, Chiayi, Taiwan","institution_ids":["https://openalex.org/I148099254"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031917236","display_name":"Po-Hsun Chang","orcid":null},"institutions":[{"id":"https://openalex.org/I148099254","display_name":"National Chung Cheng University","ror":"https://ror.org/0028v3876","country_code":"TW","type":"education","lineage":["https://openalex.org/I148099254"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Po-Hsun Chang","raw_affiliation_strings":["Department of Electrical Engineering, National Chung Cheng University, Chiayi, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Chung Cheng University, Chiayi, Taiwan","institution_ids":["https://openalex.org/I148099254"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5015308343","display_name":"Shuenn-Yuh Lee","orcid":"https://orcid.org/0000-0002-9757-1410"},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Shuenn-Yuh Lee","raw_affiliation_strings":["Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan","institution_ids":["https://openalex.org/I91807558"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5033163680","display_name":"Helmut Graeb","orcid":"https://orcid.org/0000-0002-7626-1958"},"institutions":[{"id":"https://openalex.org/I62916508","display_name":"Technical University of Munich","ror":"https://ror.org/02kkvpp62","country_code":"DE","type":"education","lineage":["https://openalex.org/I62916508"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Helmut E. Graeb","raw_affiliation_strings":["Institute for Electronic Design Automation, Technical University of Munich, Munich, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute for Electronic Design Automation, Technical University of Munich, Munich, Germany","institution_ids":["https://openalex.org/I62916508"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.6025,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.74504693,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"35","issue":"8","first_page":"1229","last_page":"1242"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/analog-signal","display_name":"Analog signal","score":0.6453689932823181},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.6327232718467712},{"id":"https://openalex.org/keywords/mixed-signal-integrated-circuit","display_name":"Mixed-signal integrated circuit","score":0.5845194458961487},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5230908393859863},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.5054202079772949},{"id":"https://openalex.org/keywords/signal-transfer-function","display_name":"Signal transfer function","score":0.4852297306060791},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.46649786829948425},{"id":"https://openalex.org/keywords/digital-signal","display_name":"Digital signal","score":0.43303224444389343},{"id":"https://openalex.org/keywords/analogue-electronics","display_name":"Analogue electronics","score":0.4287588596343994},{"id":"https://openalex.org/keywords/delta-sigma-modulation","display_name":"Delta-sigma modulation","score":0.4158678352832794},{"id":"https://openalex.org/keywords/distortion","display_name":"Distortion (music)","score":0.4138067662715912},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.29630833864212036},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2958643138408661},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2297036051750183},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.21501848101615906},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.15529298782348633},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.07018867135047913}],"concepts":[{"id":"https://openalex.org/C13412647","wikidata":"https://www.wikidata.org/wiki/Q174948","display_name":"Analog signal","level":3,"score":0.6453689932823181},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6327232718467712},{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.5845194458961487},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5230908393859863},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.5054202079772949},{"id":"https://openalex.org/C131021393","wikidata":"https://www.wikidata.org/wiki/Q7512759","display_name":"Signal transfer function","level":4,"score":0.4852297306060791},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.46649786829948425},{"id":"https://openalex.org/C52773712","wikidata":"https://www.wikidata.org/wiki/Q175022","display_name":"Digital signal","level":3,"score":0.43303224444389343},{"id":"https://openalex.org/C29074008","wikidata":"https://www.wikidata.org/wiki/Q174925","display_name":"Analogue electronics","level":3,"score":0.4287588596343994},{"id":"https://openalex.org/C68754193","wikidata":"https://www.wikidata.org/wiki/Q1184820","display_name":"Delta-sigma modulation","level":3,"score":0.4158678352832794},{"id":"https://openalex.org/C126780896","wikidata":"https://www.wikidata.org/wiki/Q899871","display_name":"Distortion (music)","level":4,"score":0.4138067662715912},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.29630833864212036},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2958643138408661},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2297036051750183},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.21501848101615906},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.15529298782348633},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.07018867135047913},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.2015.2501295","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2015.2501295","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.41999998688697815,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[{"id":"https://openalex.org/G580066299","display_name":null,"funder_award_id":"NSC 102-2220-E-194-006","funder_id":"https://openalex.org/F4320322108","funder_display_name":"Ministry of Science and Technology"},{"id":"https://openalex.org/G8165069266","display_name":null,"funder_award_id":"NSC 102-2221-E-194-065-MY2","funder_id":"https://openalex.org/F4320322108","funder_display_name":"Ministry of Science and Technology"}],"funders":[{"id":"https://openalex.org/F4320322108","display_name":"Ministry of Science and Technology","ror":"https://ror.org/032e49973"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":64,"referenced_works":["https://openalex.org/W146068009","https://openalex.org/W1540072649","https://openalex.org/W1969819710","https://openalex.org/W1976234067","https://openalex.org/W1980984060","https://openalex.org/W1987786682","https://openalex.org/W1987980734","https://openalex.org/W1996043836","https://openalex.org/W1996605065","https://openalex.org/W2006236147","https://openalex.org/W2009345382","https://openalex.org/W2009453974","https://openalex.org/W2019437651","https://openalex.org/W2034646262","https://openalex.org/W2041867638","https://openalex.org/W2042482238","https://openalex.org/W2045221862","https://openalex.org/W2045697850","https://openalex.org/W2046020806","https://openalex.org/W2056343074","https://openalex.org/W2075693636","https://openalex.org/W2094042791","https://openalex.org/W2097774291","https://openalex.org/W2103937095","https://openalex.org/W2109826730","https://openalex.org/W2112205298","https://openalex.org/W2112958118","https://openalex.org/W2113227042","https://openalex.org/W2113341980","https://openalex.org/W2114912418","https://openalex.org/W2120599026","https://openalex.org/W2125232865","https://openalex.org/W2125270192","https://openalex.org/W2126996785","https://openalex.org/W2127708750","https://openalex.org/W2127963031","https://openalex.org/W2135605864","https://openalex.org/W2138870185","https://openalex.org/W2141019759","https://openalex.org/W2145458600","https://openalex.org/W2146519106","https://openalex.org/W2148759186","https://openalex.org/W2151933980","https://openalex.org/W2155230244","https://openalex.org/W2165545669","https://openalex.org/W2197288454","https://openalex.org/W2201681339","https://openalex.org/W2493934493","https://openalex.org/W2951585343","https://openalex.org/W3148194154","https://openalex.org/W3216591548","https://openalex.org/W4214744378","https://openalex.org/W4230223115","https://openalex.org/W4233484382","https://openalex.org/W4233613151","https://openalex.org/W4237113177","https://openalex.org/W4238911906","https://openalex.org/W4249900664","https://openalex.org/W4252620984","https://openalex.org/W4256007160","https://openalex.org/W4302087205","https://openalex.org/W6652775201","https://openalex.org/W6655040866","https://openalex.org/W6804756794"],"related_works":["https://openalex.org/W2185815555","https://openalex.org/W2053330176","https://openalex.org/W2226132956","https://openalex.org/W3102978314","https://openalex.org/W1981652693","https://openalex.org/W2076925294","https://openalex.org/W1162056860","https://openalex.org/W1862020018","https://openalex.org/W21994612","https://openalex.org/W2498536136"],"abstract_inverted_index":{"With":[0],"shrinking":[1],"process":[2],"technology,":[3],"decreasing":[4],"supply":[5],"voltage,":[6],"and":[7,15,37,51,67,87,117,125,128],"increasing":[8],"clock":[9],"frequency,":[10],"noise":[11,30,93],"reduction":[12],"becomes":[13],"more":[14,16],"crucial":[17],"to":[18,32,43],"the":[19,28,46,83,106],"success":[20],"of":[21,49,85],"modern":[22],"mixed-signal":[23,56,78],"system-on-chip":[24],"design.":[25],"To":[26],"eliminate":[27],"switching":[29,92],"due":[31],"crosstalk":[33],"coupling":[34],"between":[35],"analog":[36,50,66,86,116],"digital":[38,52,68,88,118],"signals,":[39],"it":[40],"is":[41],"essential":[42],"fully":[44,64],"separate":[45,65],"routing":[47,69],"paths":[48,90,120],"nets":[53],"when":[54],"generating":[55],"layouts.":[57],"Different":[58],"from":[59],"previous":[60],"works":[61],"which":[62],"cannot":[63],"paths,":[70],"this":[71],"paper":[72],"presents":[73],"a":[74,99],"novel":[75],"hierarchical":[76],"deterministic":[77],"layout":[79],"synthesis":[80],"approach":[81,108],"with":[82,114],"separation":[84],"signal":[89,119],"for":[91],"elimination.":[94],"Experimental":[95],"results":[96],"based":[97],"on":[98],"third-order":[100],"\u03a3":[101],"\u0394":[102],"modulator":[103],"show":[104],"that":[105],"proposed":[107],"can":[109],"result":[110],"in":[111],"various":[112],"layouts":[113],"separated":[115],"while":[121],"achieving":[122],"better":[123],"signal-to-noise":[124],"distortion":[126],"ratio,":[127],"overall":[129],"performance":[130],"specifications.":[131]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
