{"id":"https://openalex.org/W2091618036","doi":"https://doi.org/10.1109/tcad.2015.2427278","title":"Synthesis and Optimization of Pipelines for HW Implementations of Dataflow Programs","display_name":"Synthesis and Optimization of Pipelines for HW Implementations of Dataflow Programs","publication_year":2015,"publication_date":"2015-04-28","ids":{"openalex":"https://openalex.org/W2091618036","doi":"https://doi.org/10.1109/tcad.2015.2427278","mag":"2091618036"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2015.2427278","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2015.2427278","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://infoscience.epfl.ch/record/209238","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5027175391","display_name":"\u0410. \u0410. Prihozhy","orcid":"https://orcid.org/0000-0002-1941-0806"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":true,"raw_author_name":"Anatoly Prihozhy","raw_affiliation_strings":["\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne, Lausanne, Switzerland","\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne; Lausanne Switzerland"],"affiliations":[{"raw_affiliation_string":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne, Lausanne, Switzerland","institution_ids":["https://openalex.org/I5124864"]},{"raw_affiliation_string":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne; Lausanne Switzerland","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033404153","display_name":"Endri Bezati","orcid":"https://orcid.org/0000-0003-3446-9838"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Endri Bezati","raw_affiliation_strings":["SCI-STI-MM, \u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne, Lausanne, Switzerland","[SCI-STI-MM, \u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne, Lausanne, Switzerland]"],"affiliations":[{"raw_affiliation_string":"SCI-STI-MM, \u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne, Lausanne, Switzerland","institution_ids":["https://openalex.org/I5124864"]},{"raw_affiliation_string":"[SCI-STI-MM, \u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne, Lausanne, Switzerland]","institution_ids":["https://openalex.org/I5124864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5026822024","display_name":"Ab Al-Hadi Ab Rahman","orcid":"https://orcid.org/0000-0002-0754-5199"},"institutions":[{"id":"https://openalex.org/I4576418","display_name":"University of Technology Malaysia","ror":"https://ror.org/026w31v75","country_code":"MY","type":"education","lineage":["https://openalex.org/I4576418"]}],"countries":["MY"],"is_corresponding":false,"raw_author_name":"Ab Al-Hadi Ab Rahman","raw_affiliation_strings":["DSIP Research Group, Universiti Teknologi Malaysia, Johor Bahru, Malaysia","[DSIP Research Group, Universiti Teknologi Malaysia, Johor Bahru, Malaysia]"],"affiliations":[{"raw_affiliation_string":"DSIP Research Group, Universiti Teknologi Malaysia, Johor Bahru, Malaysia","institution_ids":["https://openalex.org/I4576418"]},{"raw_affiliation_string":"[DSIP Research Group, Universiti Teknologi Malaysia, Johor Bahru, Malaysia]","institution_ids":["https://openalex.org/I4576418"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5013188524","display_name":"Marco Mattavelli","orcid":"https://orcid.org/0000-0002-7742-0332"},"institutions":[{"id":"https://openalex.org/I5124864","display_name":"\u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne","ror":"https://ror.org/02s376052","country_code":"CH","type":"education","lineage":["https://openalex.org/I2799323385","https://openalex.org/I5124864"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Marco Mattavelli","raw_affiliation_strings":["SCI-STI-MM, \u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne, Lausanne, Switzerland","[SCI-STI-MM, \u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne, Lausanne, Switzerland]"],"affiliations":[{"raw_affiliation_string":"SCI-STI-MM, \u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne, Lausanne, Switzerland","institution_ids":["https://openalex.org/I5124864"]},{"raw_affiliation_string":"[SCI-STI-MM, \u00c9cole Polytechnique F\u00e9d\u00e9rale de Lausanne, Lausanne, Switzerland]","institution_ids":["https://openalex.org/I5124864"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5027175391"],"corresponding_institution_ids":["https://openalex.org/I5124864"],"apc_list":null,"apc_paid":null,"fwci":1.9379,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.8602325,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"34","issue":"10","first_page":"1613","last_page":"1626"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dataflow","display_name":"Dataflow","score":0.9379959106445312},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.811028778553009},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7583953142166138},{"id":"https://openalex.org/keywords/pipeline-transport","display_name":"Pipeline transport","score":0.6670051217079163},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6299822330474854},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.5605641603469849},{"id":"https://openalex.org/keywords/dataflow-architecture","display_name":"Dataflow architecture","score":0.5401259064674377},{"id":"https://openalex.org/keywords/register-allocation","display_name":"Register allocation","score":0.5333480834960938},{"id":"https://openalex.org/keywords/schedule","display_name":"Schedule","score":0.4981720447540283},{"id":"https://openalex.org/keywords/tree-traversal","display_name":"Tree traversal","score":0.44083383679389954},{"id":"https://openalex.org/keywords/heuristic","display_name":"Heuristic","score":0.4230673909187317},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.4215560257434845},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.34235379099845886},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.32743680477142334},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.269437313079834},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.17072540521621704},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.15144094824790955},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.11158502101898193},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.10346812009811401}],"concepts":[{"id":"https://openalex.org/C96324660","wikidata":"https://www.wikidata.org/wiki/Q205446","display_name":"Dataflow","level":2,"score":0.9379959106445312},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.811028778553009},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7583953142166138},{"id":"https://openalex.org/C175309249","wikidata":"https://www.wikidata.org/wiki/Q725864","display_name":"Pipeline transport","level":2,"score":0.6670051217079163},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6299822330474854},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.5605641603469849},{"id":"https://openalex.org/C176727019","wikidata":"https://www.wikidata.org/wiki/Q1172415","display_name":"Dataflow architecture","level":3,"score":0.5401259064674377},{"id":"https://openalex.org/C128916667","wikidata":"https://www.wikidata.org/wiki/Q1343660","display_name":"Register allocation","level":3,"score":0.5333480834960938},{"id":"https://openalex.org/C68387754","wikidata":"https://www.wikidata.org/wiki/Q7271585","display_name":"Schedule","level":2,"score":0.4981720447540283},{"id":"https://openalex.org/C140745168","wikidata":"https://www.wikidata.org/wiki/Q1210082","display_name":"Tree traversal","level":2,"score":0.44083383679389954},{"id":"https://openalex.org/C173801870","wikidata":"https://www.wikidata.org/wiki/Q201413","display_name":"Heuristic","level":2,"score":0.4230673909187317},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.4215560257434845},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.34235379099845886},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.32743680477142334},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.269437313079834},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.17072540521621704},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.15144094824790955},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.11158502101898193},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.10346812009811401},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C87717796","wikidata":"https://www.wikidata.org/wiki/Q146326","display_name":"Environmental engineering","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tcad.2015.2427278","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2015.2427278","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},{"id":"pmh:oai:infoscience.epfl.ch:209238","is_oa":true,"landing_page_url":"http://infoscience.epfl.ch/record/209238","pdf_url":null,"source":{"id":"https://openalex.org/S4306400487","display_name":"Infoscience (Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Text"}],"best_oa_location":{"id":"pmh:oai:infoscience.epfl.ch:209238","is_oa":true,"landing_page_url":"http://infoscience.epfl.ch/record/209238","pdf_url":null,"source":{"id":"https://openalex.org/S4306400487","display_name":"Infoscience (Ecole Polytechnique F\u00e9d\u00e9rale de Lausanne)","issn_l":null,"issn":null,"is_oa":true,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Text"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.4000000059604645,"display_name":"Industry, innovation and infrastructure"}],"awards":[{"id":"https://openalex.org/G8279459230","display_name":null,"funder_award_id":"200020_146712","funder_id":"https://openalex.org/F4320320924","funder_display_name":"Schweizerischer Nationalfonds zur F\u00f6rderung der Wissenschaftlichen Forschung"}],"funders":[{"id":"https://openalex.org/F4320320924","display_name":"Schweizerischer Nationalfonds zur F\u00f6rderung der Wissenschaftlichen Forschung","ror":"https://ror.org/00yjd3n13"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":49,"referenced_works":["https://openalex.org/W1535347731","https://openalex.org/W1597755753","https://openalex.org/W1726791785","https://openalex.org/W1976377677","https://openalex.org/W2012471639","https://openalex.org/W2013878293","https://openalex.org/W2023223057","https://openalex.org/W2029823978","https://openalex.org/W2062530062","https://openalex.org/W2068350180","https://openalex.org/W2091158003","https://openalex.org/W2093842169","https://openalex.org/W2100596926","https://openalex.org/W2104570240","https://openalex.org/W2105664689","https://openalex.org/W2109480058","https://openalex.org/W2117678124","https://openalex.org/W2118052680","https://openalex.org/W2119454096","https://openalex.org/W2121398690","https://openalex.org/W2122712122","https://openalex.org/W2126298435","https://openalex.org/W2129956396","https://openalex.org/W2137453077","https://openalex.org/W2140585279","https://openalex.org/W2142524277","https://openalex.org/W2143674717","https://openalex.org/W2146706946","https://openalex.org/W2147088458","https://openalex.org/W2148631003","https://openalex.org/W2153692451","https://openalex.org/W2153844238","https://openalex.org/W2158009368","https://openalex.org/W2159745848","https://openalex.org/W2170713926","https://openalex.org/W2171595223","https://openalex.org/W2285088595","https://openalex.org/W2293225001","https://openalex.org/W3211073705","https://openalex.org/W4232496889","https://openalex.org/W4236145149","https://openalex.org/W4251051882","https://openalex.org/W4285719527","https://openalex.org/W6632165618","https://openalex.org/W6635964534","https://openalex.org/W6637583060","https://openalex.org/W6678293755","https://openalex.org/W6681482952","https://openalex.org/W6681971441"],"related_works":["https://openalex.org/W2564598376","https://openalex.org/W1484403103","https://openalex.org/W2584408851","https://openalex.org/W2115158825","https://openalex.org/W2101960124","https://openalex.org/W2783505431","https://openalex.org/W2521947294","https://openalex.org/W2070353846","https://openalex.org/W4236419692","https://openalex.org/W2017802743"],"abstract_inverted_index":{"This":[0],"paper":[1],"introduces":[2],"a":[3,47,87,109,150],"new":[4,99,159],"methodology":[5],"for":[6,38,122,133],"pipeline":[7,18,40,51,74,80,100,145,176],"synthesis":[8,19],"with":[9,67],"applications":[10],"to":[11,22,63,94,153,181],"data":[12],"flow":[13],"high-level":[14],"system":[15],"design.":[16],"The":[17,77,115,158],"is":[20,65,82],"applied":[21],"dataflow":[23,88,168],"programs":[24],"whose":[25],"operators":[26,62],"are":[27,35,53],"translated":[28],"into":[29,86],"graphs":[30],"and":[31,56,106,108,165],"dependencies":[32],"relations":[33],"that":[34,90,142],"then":[36,57],"processed":[37],"the":[39,68,72,127,143,162,173],"architecture":[41],"optimization.":[42],"For":[43],"each":[44],"pipeline-stage":[45],"time,":[46],"minimal":[48],"number":[49],"of":[50,61,70,175],"stages":[52,64],"first":[54,116],"determined":[55],"an":[58],"optimal":[59],"assignment":[60],"generated":[66],"objective":[69],"minimizing":[71],"total":[73,144],"register":[75,146,177],"size.":[76],"obtained":[78],"\u201coptimal\u201d":[79],"schedule":[81],"automatically":[83],"transformed":[84],"back":[85],"program":[89],"can":[91,155],"be":[92,156],"synthesized":[93],"efficient":[95],"hardware":[96],"implementations.":[97],"Two":[98],"scheduling:":[101],"\u201cleast":[102],"cost":[103],"search":[104],"branch":[105],"bound\u201d":[107],"heuristic":[110],"technique":[111],"have":[112],"been":[113],"developed.":[114],"algorithm":[117],"yields":[118],"global":[119],"optimum":[120],"solutions":[121,132],"middle":[123],"size":[124,147,178],"designs,":[125],"whereas":[126],"second":[128],"one":[129],"generates":[130],"close-to-optimal":[131],"large":[134],"designs.":[135],"Experimental":[136],"results":[137],"on":[138,183],"FPGA":[139],"designs":[140],"show":[141],"gain":[148],"in":[149],"range":[151],"up":[152,180],"4.68\u00d7":[154],"achieved.":[157],"algorithms":[160,171],"overcome":[161],"known":[163],"downward":[164],"upward":[166],"direction":[167],"graph":[169],"traversal":[170],"concerning":[172],"amount":[174],"by":[179],"100%":[182],"average.":[184]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
