{"id":"https://openalex.org/W2101624220","doi":"https://doi.org/10.1109/tcad.2014.2313454","title":"Synthesis of Dual-Rail Adiabatic Logic for Low Power Security Applications","display_name":"Synthesis of Dual-Rail Adiabatic Logic for Low Power Security Applications","publication_year":2014,"publication_date":"2014-06-19","ids":{"openalex":"https://openalex.org/W2101624220","doi":"https://doi.org/10.1109/tcad.2014.2313454","mag":"2101624220"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2014.2313454","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2014.2313454","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5046891372","display_name":"Matthew Morrison","orcid":"https://orcid.org/0000-0002-3535-6707"},"institutions":[{"id":"https://openalex.org/I2613432","display_name":"University of South Florida","ror":"https://ror.org/032db5x82","country_code":"US","type":"education","lineage":["https://openalex.org/I2613432"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Matthew Morrison","raw_affiliation_strings":["Department of Computer Science and Engineering, University of South Florida, Tampa, FL, USA","Dept of Comput. Sci. & Eng., Univ. of South Florida, Tampa, FL, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, University of South Florida, Tampa, FL, USA","institution_ids":["https://openalex.org/I2613432"]},{"raw_affiliation_string":"Dept of Comput. Sci. & Eng., Univ. of South Florida, Tampa, FL, USA","institution_ids":["https://openalex.org/I2613432"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5027665366","display_name":"N. Ranganathan","orcid":null},"institutions":[{"id":"https://openalex.org/I2613432","display_name":"University of South Florida","ror":"https://ror.org/032db5x82","country_code":"US","type":"education","lineage":["https://openalex.org/I2613432"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Nagarajan Ranganathan","raw_affiliation_strings":["Department of Computer Science and Engineering, University of South Florida, Tampa, FL, USA","Dept of Comput. Sci. & Eng., Univ. of South Florida, Tampa, FL, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, University of South Florida, Tampa, FL, USA","institution_ids":["https://openalex.org/I2613432"]},{"raw_affiliation_string":"Dept of Comput. Sci. & Eng., Univ. of South Florida, Tampa, FL, USA","institution_ids":["https://openalex.org/I2613432"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":4.4058,"has_fulltext":false,"cited_by_count":29,"citation_normalized_percentile":{"value":0.94843962,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":99},"biblio":{"volume":"33","issue":"7","first_page":"975","last_page":"988"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.596642017364502},{"id":"https://openalex.org/keywords/adiabatic-circuit","display_name":"Adiabatic circuit","score":0.5052390694618225},{"id":"https://openalex.org/keywords/pass-transistor-logic","display_name":"Pass transistor logic","score":0.5046828985214233},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4748416543006897},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.45556876063346863},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.45162880420684814},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.4423748850822449},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.42551666498184204},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.33742713928222656},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.31639403104782104},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2163035273551941},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20995348691940308},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.10138827562332153}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.596642017364502},{"id":"https://openalex.org/C87606752","wikidata":"https://www.wikidata.org/wiki/Q4682637","display_name":"Adiabatic circuit","level":5,"score":0.5052390694618225},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.5046828985214233},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4748416543006897},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.45556876063346863},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.45162880420684814},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.4423748850822449},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.42551666498184204},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.33742713928222656},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.31639403104782104},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2163035273551941},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20995348691940308},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.10138827562332153}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.2014.2313454","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2014.2313454","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8899999856948853,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":44,"referenced_works":["https://openalex.org/W34744470","https://openalex.org/W90134177","https://openalex.org/W1501238516","https://openalex.org/W1640136614","https://openalex.org/W1940573008","https://openalex.org/W1965836730","https://openalex.org/W1975951815","https://openalex.org/W2011342051","https://openalex.org/W2013966269","https://openalex.org/W2018755379","https://openalex.org/W2031269630","https://openalex.org/W2036347549","https://openalex.org/W2076817360","https://openalex.org/W2099179520","https://openalex.org/W2102920194","https://openalex.org/W2105259569","https://openalex.org/W2109396078","https://openalex.org/W2114638353","https://openalex.org/W2114980291","https://openalex.org/W2122984966","https://openalex.org/W2123063952","https://openalex.org/W2124808421","https://openalex.org/W2136533908","https://openalex.org/W2144630005","https://openalex.org/W2147530955","https://openalex.org/W2150302545","https://openalex.org/W2163354454","https://openalex.org/W2164724325","https://openalex.org/W2165995181","https://openalex.org/W2167848093","https://openalex.org/W2188748254","https://openalex.org/W2745831367","https://openalex.org/W2912120411","https://openalex.org/W2912318510","https://openalex.org/W3141214807","https://openalex.org/W4231098049","https://openalex.org/W4233347701","https://openalex.org/W4242597152","https://openalex.org/W4251109627","https://openalex.org/W4251491041","https://openalex.org/W6601365000","https://openalex.org/W6655062473","https://openalex.org/W6674717686","https://openalex.org/W6676505718"],"related_works":["https://openalex.org/W2580743037","https://openalex.org/W2965791759","https://openalex.org/W2539423522","https://openalex.org/W2988242922","https://openalex.org/W2042750210","https://openalex.org/W2008009631","https://openalex.org/W2147530955","https://openalex.org/W1521268501","https://openalex.org/W2156660390","https://openalex.org/W2542337934"],"abstract_inverted_index":{"Programmable":[0],"reversible":[1,42,185],"logic":[2,8,37,43,73],"is":[3,26,38,53,66,90,98,210],"emerging":[4],"as":[5,29,101],"a":[6,161],"prospective":[7],"design":[9,83,93,209],"style":[10],"for":[11,111,123,156,222],"implementation":[12,40],"in":[13,44,70,76,86,116,147],"low":[14,16],"power,":[15,80],"frequency":[17,97],"applications":[18,87],"where":[19,46,88],"minimal":[20,219],"impact":[21],"on":[22,129,171],"circuit":[23,52],"heat":[24],"generation":[25],"desirable,":[27],"such":[28,55,100],"mitigation":[30],"of":[31,41,113,125,137,159,163,179,212],"differential":[32,79],"power":[33],"analysis":[34],"attacks.":[35],"Adiabatic":[36],"an":[39,109,177,196],"CMOS":[45],"the":[47,51,57,91,120,135,138,144,148,152,173,182,188],"current":[48],"flow":[49],"through":[50],"controlled":[54],"that":[56],"energy":[58,202],"dissipation":[59,65],"due":[60],"to":[61,205],"switching":[62],"and":[63,78,95,215],"capacitor":[64],"minimized.":[67],"Recent":[68],"advances":[69],"dual-rail":[71,190],"adiabatic":[72,114,197],"show":[74,169],"reduction":[75],"average":[77],"making":[81],"this":[82,105],"methodology":[84],"advantageous":[85],"security":[89],"primary":[92],"metric":[94],"operating":[96],"slower,":[99],"Smart":[102],"Cards.":[103],"In":[104],"paper,":[106],"we":[107,133,194],"present":[108,195],"algorithm":[110,175],"synthesis":[112,157,167],"circuits":[115],"CMOS.":[117],"Then,":[118,193],"using":[119,160],"ESPRESSO":[121],"heuristic":[122],"minimization":[124],"Boolean":[126],"functions":[127],"method":[128],"each":[130],"output":[131],"node,":[132],"reduce":[134],"size":[136],"synthesized":[139],"circuit.":[140],"Our":[141],"approach":[142],"correlates":[143],"horizontal":[145],"offsets":[146],"permutation":[149],"matrix":[150],"with":[151,187,218],"necessary":[153],"switches":[154],"required":[155],"instead":[158],"library":[162],"equivalent":[164],"functions.":[165],"The":[166,208],"results":[168],"that,":[170],"average,":[172],"proposed":[174],"represents":[176],"improvement":[178],"36%":[180],"over":[181],"best":[183],"known":[184],"designs":[186],"optimized":[189],"cell":[191],"libraries.":[192],"S-box":[198],"which":[199],"significantly":[200],"reduces":[201],"imbalance":[203],"compared":[204],"previous":[206],"benchmarks.":[207],"capable":[211],"forward":[213],"encryption":[214],"reverse":[216],"decryption":[217],"overhead,":[220],"allowing":[221],"efficient":[223],"hardware":[224],"reuse.":[225]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":2},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":3},{"year":2016,"cited_by_count":6},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":3}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2016-06-24T00:00:00"}