{"id":"https://openalex.org/W2135042086","doi":"https://doi.org/10.1109/tcad.2014.2307533","title":"A Hybrid Approach for Fast and Accurate Trace Signal Selection for Post-Silicon Debug","display_name":"A Hybrid Approach for Fast and Accurate Trace Signal Selection for Post-Silicon Debug","publication_year":2014,"publication_date":"2014-07-01","ids":{"openalex":"https://openalex.org/W2135042086","doi":"https://doi.org/10.1109/tcad.2014.2307533","mag":"2135042086"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2014.2307533","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2014.2307533","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5080841606","display_name":"Min Li","orcid":"https://orcid.org/0000-0003-3276-6812"},"institutions":[{"id":"https://openalex.org/I135310074","display_name":"University of Wisconsin\u2013Madison","ror":"https://ror.org/01y2jtd41","country_code":"US","type":"education","lineage":["https://openalex.org/I135310074"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Min Li","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Wisconsin-Madison, Madison, WI, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Wisconsin-Madison, Madison, WI, USA","institution_ids":["https://openalex.org/I135310074"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5072204999","display_name":"Azadeh Davoodi","orcid":"https://orcid.org/0000-0001-5213-2556"},"institutions":[{"id":"https://openalex.org/I135310074","display_name":"University of Wisconsin\u2013Madison","ror":"https://ror.org/01y2jtd41","country_code":"US","type":"education","lineage":["https://openalex.org/I135310074"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Azadeh Davoodi","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Wisconsin-Madison, Madison, WI, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Wisconsin-Madison, Madison, WI, USA","institution_ids":["https://openalex.org/I135310074"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I135310074"],"apc_list":null,"apc_paid":null,"fwci":3.0803,"has_fulltext":false,"cited_by_count":24,"citation_normalized_percentile":{"value":0.91768534,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"33","issue":"7","first_page":"1081","last_page":"1094"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.9952999949455261,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/tracing","display_name":"Tracing","score":0.8326758742332458},{"id":"https://openalex.org/keywords/debugging","display_name":"Debugging","score":0.8220584392547607},{"id":"https://openalex.org/keywords/trace","display_name":"TRACE (psycholinguistics)","score":0.7834328413009644},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7688013315200806},{"id":"https://openalex.org/keywords/observability","display_name":"Observability","score":0.7170310020446777},{"id":"https://openalex.org/keywords/metric","display_name":"Metric (unit)","score":0.5966904163360596},{"id":"https://openalex.org/keywords/selection","display_name":"Selection (genetic algorithm)","score":0.44597792625427246},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.4439982771873474},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.4249497652053833},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.34764546155929565},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.11538949608802795},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.09256243705749512},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.08743062615394592},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.06492158770561218}],"concepts":[{"id":"https://openalex.org/C138673069","wikidata":"https://www.wikidata.org/wiki/Q322229","display_name":"Tracing","level":2,"score":0.8326758742332458},{"id":"https://openalex.org/C168065819","wikidata":"https://www.wikidata.org/wiki/Q845566","display_name":"Debugging","level":2,"score":0.8220584392547607},{"id":"https://openalex.org/C75291252","wikidata":"https://www.wikidata.org/wiki/Q1315756","display_name":"TRACE (psycholinguistics)","level":2,"score":0.7834328413009644},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7688013315200806},{"id":"https://openalex.org/C36299963","wikidata":"https://www.wikidata.org/wiki/Q1369844","display_name":"Observability","level":2,"score":0.7170310020446777},{"id":"https://openalex.org/C176217482","wikidata":"https://www.wikidata.org/wiki/Q860554","display_name":"Metric (unit)","level":2,"score":0.5966904163360596},{"id":"https://openalex.org/C81917197","wikidata":"https://www.wikidata.org/wiki/Q628760","display_name":"Selection (genetic algorithm)","level":2,"score":0.44597792625427246},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.4439982771873474},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.4249497652053833},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.34764546155929565},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.11538949608802795},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.09256243705749512},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.08743062615394592},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.06492158770561218},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C28826006","wikidata":"https://www.wikidata.org/wiki/Q33521","display_name":"Applied mathematics","level":1,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.2014.2307533","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2014.2307533","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1965393470","https://openalex.org/W1974368829","https://openalex.org/W1981868262","https://openalex.org/W2037323072","https://openalex.org/W2044605272","https://openalex.org/W2051059258","https://openalex.org/W2071658507","https://openalex.org/W2088256110","https://openalex.org/W2115935202","https://openalex.org/W2120263045","https://openalex.org/W2122146819","https://openalex.org/W2138551793","https://openalex.org/W2140980952","https://openalex.org/W2141261568","https://openalex.org/W2152406824","https://openalex.org/W2153440685","https://openalex.org/W2167526955","https://openalex.org/W3143010053","https://openalex.org/W3143275871","https://openalex.org/W6677339423"],"related_works":["https://openalex.org/W138412134","https://openalex.org/W3147005146","https://openalex.org/W2108078705","https://openalex.org/W2543101158","https://openalex.org/W2062141481","https://openalex.org/W1836768014","https://openalex.org/W1569638199","https://openalex.org/W2115308562","https://openalex.org/W2789571330","https://openalex.org/W4299652732"],"abstract_inverted_index":{"A":[0],"major":[1],"challenge":[2,27],"in":[3],"post-silicon":[4],"debug":[5],"is":[6],"the":[7,12,39,43,70,75,124],"lack":[8],"of":[9,15,31,42,69],"observability":[10],"to":[11,24,38,66,123],"internal":[13],"signals":[14],"a":[16,32,47,102,119],"chip.":[17],"Trace":[18],"buffer":[19],"technology":[20],"provides":[21],"one":[22],"venue":[23],"address":[25],"this":[26],"by":[28],"online":[29],"tracing":[30],"few":[33,48,76],"selected":[34,53],"state":[35,49,72],"elements.":[36],"Due":[37],"limited":[40],"bandwidth":[41],"trace":[44,62,104],"buffer,":[45],"only":[46],"elements":[50,73],"can":[51,81],"be":[52,82],"for":[54],"tracing.":[55],"Recent":[56],"research":[57],"has":[58,109,118],"focused":[59],"on":[60],"automated":[61],"signal":[63,105],"selection":[64,106],"problem":[65],"maximize":[67],"restoration":[68],"untraced":[71],"using":[74],"traced":[77],"signals.":[78],"Existing":[79],"techniques":[80,90],"categorized":[83],"into":[84],"high":[85],"quality":[86,93,113],"but":[87,94],"slow":[88],"simulation-based":[89,115],"and":[91],"lower":[92],"much":[95],"faster":[96],"metric-based":[97,125],"techniques.":[98,126],"This":[99],"paper":[100],"presents":[101],"new":[103],"technique":[107],"which":[108],"comparable":[110,122],"or":[111],"better":[112],"than":[114],"while":[116],"it":[117],"fast":[120],"runtime,":[121]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":8},{"year":2017,"cited_by_count":6},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}