{"id":"https://openalex.org/W2005865544","doi":"https://doi.org/10.1109/tcad.2012.2217962","title":"Low-Power Digital Signal Processing Using Approximate Adders","display_name":"Low-Power Digital Signal Processing Using Approximate Adders","publication_year":2012,"publication_date":"2012-12-19","ids":{"openalex":"https://openalex.org/W2005865544","doi":"https://doi.org/10.1109/tcad.2012.2217962","mag":"2005865544"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2012.2217962","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2012.2217962","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101657676","display_name":"Vaibhav Gupta","orcid":"https://orcid.org/0000-0001-7793-5590"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Vaibhav Gupta","raw_affiliation_strings":["Department of Electrical and Computer Engineering, School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","Dept. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5106083836","display_name":"Debabrata Mohapatra","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Debabrata Mohapatra","raw_affiliation_strings":["Intel Corporation, Santa Clara, CA, USA","Intel Corp., Santa Clara, CA, , USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corp., Santa Clara, CA, , USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065766721","display_name":"Anand Raghunathan","orcid":"https://orcid.org/0000-0002-4624-564X"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Anand Raghunathan","raw_affiliation_strings":["Department of Electrical and Computer Engineering, School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","Dept. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5031161187","display_name":"Kaushik Roy","orcid":"https://orcid.org/0000-0002-0735-9695"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kaushik Roy","raw_affiliation_strings":["Department of Electrical and Computer Engineering, School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","Dept. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":12.312,"has_fulltext":false,"cited_by_count":832,"citation_normalized_percentile":{"value":0.99232898,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":100},"biblio":{"volume":"32","issue":"1","first_page":"124","last_page":"137"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.8814495801925659},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7173749208450317},{"id":"https://openalex.org/keywords/discrete-cosine-transform","display_name":"Discrete cosine transform","score":0.5311908721923828},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.4721006751060486},{"id":"https://openalex.org/keywords/finite-impulse-response","display_name":"Finite impulse response","score":0.46091535687446594},{"id":"https://openalex.org/keywords/context","display_name":"Context (archaeology)","score":0.45319071412086487},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4410397708415985},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.43837589025497437},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4203711748123169},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.41031503677368164},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3896075487136841},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.284614622592926},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.25801241397857666},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.1384303867816925},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.13662421703338623},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.11281770467758179},{"id":"https://openalex.org/keywords/image","display_name":"Image (mathematics)","score":0.09261780977249146},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.0919136106967926}],"concepts":[{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.8814495801925659},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7173749208450317},{"id":"https://openalex.org/C2221639","wikidata":"https://www.wikidata.org/wiki/Q2877","display_name":"Discrete cosine transform","level":3,"score":0.5311908721923828},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.4721006751060486},{"id":"https://openalex.org/C198386975","wikidata":"https://www.wikidata.org/wiki/Q117785","display_name":"Finite impulse response","level":2,"score":0.46091535687446594},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.45319071412086487},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4410397708415985},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.43837589025497437},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4203711748123169},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.41031503677368164},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3896075487136841},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.284614622592926},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.25801241397857666},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.1384303867816925},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.13662421703338623},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.11281770467758179},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.09261780977249146},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0919136106967926},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.2012.2217962","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2012.2217962","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.7699999809265137,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":39,"referenced_works":["https://openalex.org/W115216132","https://openalex.org/W1501488688","https://openalex.org/W1517494495","https://openalex.org/W1576703464","https://openalex.org/W1579004116","https://openalex.org/W1985856855","https://openalex.org/W1999356037","https://openalex.org/W2010468809","https://openalex.org/W2053323369","https://openalex.org/W2054414024","https://openalex.org/W2092759974","https://openalex.org/W2097366465","https://openalex.org/W2100098458","https://openalex.org/W2104578404","https://openalex.org/W2106360508","https://openalex.org/W2106484393","https://openalex.org/W2115722171","https://openalex.org/W2128065014","https://openalex.org/W2129394555","https://openalex.org/W2135089667","https://openalex.org/W2135100177","https://openalex.org/W2140196014","https://openalex.org/W2143384051","https://openalex.org/W2144790921","https://openalex.org/W2149525543","https://openalex.org/W2150117706","https://openalex.org/W2155458498","https://openalex.org/W2157024459","https://openalex.org/W2158102622","https://openalex.org/W2170902568","https://openalex.org/W3139678091","https://openalex.org/W3141620748","https://openalex.org/W3141680615","https://openalex.org/W3144137741","https://openalex.org/W3149223600","https://openalex.org/W4255029913","https://openalex.org/W6634717524","https://openalex.org/W6676258682","https://openalex.org/W6682463457"],"related_works":["https://openalex.org/W3217463396","https://openalex.org/W2790557758","https://openalex.org/W2516396101","https://openalex.org/W3204929712","https://openalex.org/W4295102875","https://openalex.org/W2015457513","https://openalex.org/W3082309838","https://openalex.org/W2352374383","https://openalex.org/W1980880153","https://openalex.org/W2563996964"],"abstract_inverted_index":{"Low":[0],"power":[1,171,210],"is":[2],"an":[3,77],"imperative":[4],"requirement":[5],"for":[6,140,168],"portable":[7],"multimedia":[8,19],"devices":[9],"employing":[10],"various":[11,95],"signal":[12,189],"processing":[13,190],"algorithms":[14,145],"and":[15,56,109,142,152,170,195],"architectures.":[16],"In":[17,64,117],"most":[18],"applications,":[20],"human":[21],"beings":[22],"can":[23],"gather":[24],"useful":[25],"information":[26],"from":[27],"slightly":[28],"erroneous":[29],"outputs.":[30,41],"Therefore,":[31],"we":[32,67,178],"do":[33],"not":[34],"need":[35],"to":[36,59,80,112,119,155,208,219],"produce":[37],"exactly":[38],"correct":[39],"numerical":[40,87],"Previous":[42],"research":[43],"in":[44,123,129,186],"this":[45,65,91],"context":[46],"exploits":[47],"error":[48,169],"resiliency":[49],"primarily":[50],"through":[51],"voltage":[52,135],"overscaling,":[53],"utilizing":[54],"algorithmic":[55],"architectural":[57],"techniques":[58,127],"mitigate":[60],"the":[61,73,84,106,120,147,157,180,213],"resulting":[62],"errors.":[63],"paper,":[66],"propose":[68],"logic":[69],"complexity":[70,104],"reduction":[71,122],"at":[72,105],"transistor":[74,107],"level":[75],"as":[76],"alternative":[78],"approach":[79],"take":[81],"advantage":[82],"of":[83,86,159,173,182],"relaxation":[85],"accuracy.":[88],"We":[89,137,162],"demonstrate":[90,156,179],"concept":[92],"by":[93],"proposing":[94],"imprecise":[96],"or":[97],"approximate":[98,114,149,175,184,215],"full":[99],"adder":[100],"cells":[101],"with":[102,200],"reduced":[103],"level,":[108],"utilize":[110],"them":[111,154],"design":[113,138],"multi-bit":[115],"adders.":[116,176,224],"addition":[118],"inherent":[121],"switched":[124],"capacitance,":[125],"our":[126,160],"result":[128],"significantly":[130],"shorter":[131],"critical":[132],"paths,":[133],"enabling":[134],"scaling.":[136],"architectures":[139,191],"video":[141],"image":[143],"compression":[144],"using":[146,212,222],"proposed":[148,214],"arithmetic":[150],"units":[151],"evaluate":[153],"efficacy":[158],"approach.":[161],"also":[163],"derive":[164],"simple":[165],"mathematical":[166],"models":[167],"consumption":[172],"these":[174,183],"Furthermore,":[177],"utility":[181],"adders":[185],"two":[187],"digital":[188],"(discrete":[192],"cosine":[193],"transform":[194],"finite":[196],"impulse":[197],"response":[198],"filter)":[199],"specific":[201],"quality":[202],"constraints.":[203],"Simulation":[204],"results":[205],"indicate":[206],"up":[207],"69%":[209],"savings":[211],"adders,":[216],"when":[217],"compared":[218],"existing":[220],"implementations":[221],"accurate":[223]},"counts_by_year":[{"year":2026,"cited_by_count":24},{"year":2025,"cited_by_count":72},{"year":2024,"cited_by_count":59},{"year":2023,"cited_by_count":93},{"year":2022,"cited_by_count":69},{"year":2021,"cited_by_count":82},{"year":2020,"cited_by_count":92},{"year":2019,"cited_by_count":71},{"year":2018,"cited_by_count":86},{"year":2017,"cited_by_count":62},{"year":2016,"cited_by_count":51},{"year":2015,"cited_by_count":43},{"year":2014,"cited_by_count":20},{"year":2013,"cited_by_count":5},{"year":2012,"cited_by_count":2}],"updated_date":"2026-07-28T07:46:37.118299","created_date":"2025-10-10T00:00:00"}
