{"id":"https://openalex.org/W2041275630","doi":"https://doi.org/10.1109/tcad.2012.2188801","title":"A Dynamically Adjusting Gracefully Degrading Link-Level Fault-Tolerant Mechanism for NoCs","display_name":"A Dynamically Adjusting Gracefully Degrading Link-Level Fault-Tolerant Mechanism for NoCs","publication_year":2012,"publication_date":"2012-07-13","ids":{"openalex":"https://openalex.org/W2041275630","doi":"https://doi.org/10.1109/tcad.2012.2188801","mag":"2041275630"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2012.2188801","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2012.2188801","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5112429974","display_name":"A. Vitkovskiy","orcid":null},"institutions":[{"id":"https://openalex.org/I163151358","display_name":"Cyprus University of Technology","ror":"https://ror.org/05qt8tf94","country_code":"CY","type":"education","lineage":["https://openalex.org/I163151358"]}],"countries":["CY"],"is_corresponding":true,"raw_author_name":"Arseniy Vitkovskiy","raw_affiliation_strings":["Department of Electrical and Computer Engineering and Informatics, Cyprus University of Technology, Lemesos, Cyprus","Dept. of Electr. & Comput. Eng. & Inf., Cyprus Univ. of Technol., Lemesos, Cyprus"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering and Informatics, Cyprus University of Technology, Lemesos, Cyprus","institution_ids":["https://openalex.org/I163151358"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng. & Inf., Cyprus Univ. of Technol., Lemesos, Cyprus","institution_ids":["https://openalex.org/I163151358"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020344922","display_name":"Vassos Soteriou","orcid":"https://orcid.org/0000-0002-2818-0459"},"institutions":[{"id":"https://openalex.org/I163151358","display_name":"Cyprus University of Technology","ror":"https://ror.org/05qt8tf94","country_code":"CY","type":"education","lineage":["https://openalex.org/I163151358"]}],"countries":["CY"],"is_corresponding":false,"raw_author_name":"Vassos Soteriou","raw_affiliation_strings":["Department of Electrical and Computer Engineering and Informatics, Cyprus University of Technology, Lemesos, Cyprus","Dept. of Electr. & Comput. Eng. & Inf., Cyprus Univ. of Technol., Lemesos, Cyprus"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering and Informatics, Cyprus University of Technology, Lemesos, Cyprus","institution_ids":["https://openalex.org/I163151358"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng. & Inf., Cyprus Univ. of Technol., Lemesos, Cyprus","institution_ids":["https://openalex.org/I163151358"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5035714231","display_name":"Chrysostomos Nicopoulos","orcid":"https://orcid.org/0000-0001-6389-6068"},"institutions":[{"id":"https://openalex.org/I34771391","display_name":"University of Cyprus","ror":"https://ror.org/02qjrjx09","country_code":"CY","type":"education","lineage":["https://openalex.org/I34771391"]}],"countries":["CY"],"is_corresponding":false,"raw_author_name":"Chrysostomos Nicopoulos","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Cyprus, Nicosia, Cyprus","[Dept. of Electr. & Comput. Eng., Univ. of Cyprus, Nicosia, Cyprus]"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Cyprus, Nicosia, Cyprus","institution_ids":["https://openalex.org/I34771391"]},{"raw_affiliation_string":"[Dept. of Electr. & Comput. Eng., Univ. of Cyprus, Nicosia, Cyprus]","institution_ids":["https://openalex.org/I34771391"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5112429974"],"corresponding_institution_ids":["https://openalex.org/I163151358"],"apc_list":null,"apc_paid":null,"fwci":5.3189,"has_fulltext":false,"cited_by_count":26,"citation_normalized_percentile":{"value":0.95865637,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"31","issue":"8","first_page":"1235","last_page":"1248"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9969000220298767,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9958000183105469,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6749482750892639},{"id":"https://openalex.org/keywords/control-reconfiguration","display_name":"Control reconfiguration","score":0.637865424156189},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.5845859050750732},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5146878361701965},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.5125405788421631},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.45433077216148376},{"id":"https://openalex.org/keywords/fault-tolerance","display_name":"Fault tolerance","score":0.4444941282272339},{"id":"https://openalex.org/keywords/granularity","display_name":"Granularity","score":0.4386081397533417},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4365687966346741},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.42601633071899414},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.18257945775985718}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6749482750892639},{"id":"https://openalex.org/C119701452","wikidata":"https://www.wikidata.org/wiki/Q5165881","display_name":"Control reconfiguration","level":2,"score":0.637865424156189},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.5845859050750732},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5146878361701965},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.5125405788421631},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.45433077216148376},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.4444941282272339},{"id":"https://openalex.org/C177774035","wikidata":"https://www.wikidata.org/wiki/Q1246948","display_name":"Granularity","level":2,"score":0.4386081397533417},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4365687966346741},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.42601633071899414},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.18257945775985718},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tcad.2012.2188801","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2012.2188801","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},{"id":"pmh:oai:ktisis.cut.ac.cy:20.500.14279/4111","is_oa":false,"landing_page_url":"https://hdl.handle.net/20.500.14279/4111","pdf_url":null,"source":{"id":"https://openalex.org/S4306400897","display_name":"Ktisis at Cyprus University of Technology (Cyprus University of Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I163151358","host_organization_name":"Cyprus University of Technology","host_organization_lineage":["https://openalex.org/I163151358"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9","score":0.49000000953674316}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":46,"referenced_works":["https://openalex.org/W1552325196","https://openalex.org/W1668025881","https://openalex.org/W1981991312","https://openalex.org/W1990215011","https://openalex.org/W2017503457","https://openalex.org/W2030470272","https://openalex.org/W2062265941","https://openalex.org/W2067601010","https://openalex.org/W2072828521","https://openalex.org/W2073742560","https://openalex.org/W2095876017","https://openalex.org/W2097526521","https://openalex.org/W2097560795","https://openalex.org/W2103822993","https://openalex.org/W2109389963","https://openalex.org/W2111586337","https://openalex.org/W2117648153","https://openalex.org/W2123184444","https://openalex.org/W2125169487","https://openalex.org/W2126353164","https://openalex.org/W2129513217","https://openalex.org/W2130183852","https://openalex.org/W2131092434","https://openalex.org/W2131486214","https://openalex.org/W2132928495","https://openalex.org/W2135719553","https://openalex.org/W2136112510","https://openalex.org/W2141588782","https://openalex.org/W2143555564","https://openalex.org/W2144709243","https://openalex.org/W2147801838","https://openalex.org/W2147915525","https://openalex.org/W2151039403","https://openalex.org/W2157225945","https://openalex.org/W2159747318","https://openalex.org/W2164004001","https://openalex.org/W2164264749","https://openalex.org/W2169875292","https://openalex.org/W2541119642","https://openalex.org/W3150832729","https://openalex.org/W3169463464","https://openalex.org/W4234572373","https://openalex.org/W4235172414","https://openalex.org/W4235219143","https://openalex.org/W6676410781","https://openalex.org/W6682185305"],"related_works":["https://openalex.org/W2130594209","https://openalex.org/W1897932768","https://openalex.org/W1950809481","https://openalex.org/W2085988155","https://openalex.org/W2189025524","https://openalex.org/W2388289950","https://openalex.org/W1988994136","https://openalex.org/W2008643752","https://openalex.org/W2967532063","https://openalex.org/W1972431215"],"abstract_inverted_index":{"The":[0,169],"rapid":[1],"scaling":[2],"of":[3,79,84,126,167,189,198],"silicon":[4],"technology":[5],"has":[6],"enabled":[7],"massive":[8],"transistor":[9],"integration":[10],"densities.":[11],"Nanometer":[12],"feature":[13],"sizes,":[14],"however,":[15],"are":[16,32],"marred":[17],"by":[18,151],"increasing":[19],"variability":[20],"and":[21,183,202,210],"susceptibility":[22],"to":[23,35,102,122,134,179],"wear-out.":[24],"Billion-transistor":[25],"designs,":[26],"such":[27],"as":[28,108,145],"chip":[29,68],"multiprocessors":[30],"(CMPs),":[31],"especially":[33],"vulnerable":[34],"defects.":[36],"CMPs":[37],"rely":[38],"on":[39],"a":[40,76,129],"network-on-chip":[41],"for":[42],"all":[43],"their":[44],"communication":[45],"needs.":[46],"A":[47],"single":[48],"link":[49,107,181],"failure":[50],"within":[51,175],"this":[52,72],"on-chip":[53,177],"fabric":[54],"can":[55,64,142],"impede,":[56],"halt,":[57],"or":[58,96],"even":[59],"deadlock,":[60],"intertile":[61],"communication,":[62],"which":[63],"render":[65],"the":[66,114,124,139,165,176,187,195,199],"entire":[67,105],"multiprocessor":[69],"useless.":[70],"In":[71],"paper,":[73],"we":[74],"present":[75],"technique":[77,141],"capable":[78],"handling":[80],"very":[81],"large":[82],"numbers":[83],"permanent":[85],"wire":[86],"failures":[87,182],"that":[88,156],"occur":[89],"in":[90,164],"parallel":[91,106],"links":[92,120],"either":[93],"at":[94,97,128,186],"manufacture-time":[95],"runtime":[98],"(dynamically).":[99],"As":[100],"opposed":[101],"marking":[103],"an":[104],"faulty,":[109],"whenever":[110],"some":[111],"wires":[112,149],"fail,":[113,150],"proposed":[115,170,200],"methodology":[116],"employs":[117,172],"these":[118],"partially-faulty":[119],"(PFLs)":[121],"continue":[123],"transfer":[125],"information-albeit":[127],"gracefully":[130],"degraded":[131],"mode-in":[132],"order":[133],"maintain":[135],"network":[136,208],"connectivity.":[137],"Furthermore,":[138],"presented":[140],"designate":[143],"PFLs":[144],"fully-faulty":[146],"when":[147],"several":[148],"utilizing":[152],"appropriate":[153],"routing":[154],"algorithms":[155],"bypass":[157],"nonoperational":[158],"links,":[159],"while":[160],"still":[161],"maintaining":[162],"load-balance":[163],"vicinity":[166],"PFLs.":[168],"scheme":[171],"architectural":[173],"support":[174],"routers":[178],"detect":[180],"enable":[184],"reconfiguration":[185],"granularity":[188],"individual":[190],"wires.":[191],"Hardware":[192],"synthesis":[193],"confirms":[194],"low-cost":[196],"nature":[197],"architecture,":[201],"full-system":[203],"simulations":[204],"using":[205],"both":[206],"synthetic":[207],"traffic":[209],"real":[211],"workloads":[212],"demonstrate":[213],"its":[214],"efficacy.":[215]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":3},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":5},{"year":2015,"cited_by_count":7},{"year":2014,"cited_by_count":5},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}