{"id":"https://openalex.org/W2140439614","doi":"https://doi.org/10.1109/tcad.2011.2182352","title":"Efficient Retiming of Multirate DSP Algorithms","display_name":"Efficient Retiming of Multirate DSP Algorithms","publication_year":2012,"publication_date":"2012-05-25","ids":{"openalex":"https://openalex.org/W2140439614","doi":"https://doi.org/10.1109/tcad.2011.2182352","mag":"2140439614"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2011.2182352","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2011.2182352","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5025039922","display_name":"Xue-Yang Zhu","orcid":"https://orcid.org/0000-0002-2832-5590"},"institutions":[{"id":"https://openalex.org/I4210128818","display_name":"Institute of Software","ror":"https://ror.org/033dfsn42","country_code":"CN","type":"facility","lineage":["https://openalex.org/I19820366","https://openalex.org/I4210128818"]},{"id":"https://openalex.org/I19820366","display_name":"Chinese Academy of Sciences","ror":"https://ror.org/034t30j35","country_code":"CN","type":"funder","lineage":["https://openalex.org/I19820366"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Xue-Yang Zhu","raw_affiliation_strings":["State Key Laboratory of Computer Science, Institute of Software, Chinese Academy of Sciences, Beijing, China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of Computer Science, Institute of Software, Chinese Academy of Sciences, Beijing, China","institution_ids":["https://openalex.org/I4210128818","https://openalex.org/I19820366"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5026760188","display_name":"Twan Basten","orcid":"https://orcid.org/0000-0002-2274-7274"},"institutions":[{"id":"https://openalex.org/I83019370","display_name":"Eindhoven University of Technology","ror":"https://ror.org/02c2kyt77","country_code":"NL","type":"education","lineage":["https://openalex.org/I83019370"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Twan Basten","raw_affiliation_strings":["Department of Electrical Engineering, Eindhovan University of Technology, Eindhoven, Netherlands","Embedded Systems Institute, Eindhoven, Netherlands"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Eindhovan University of Technology, Eindhoven, Netherlands","institution_ids":["https://openalex.org/I83019370"]},{"raw_affiliation_string":"Embedded Systems Institute, Eindhoven, Netherlands","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063550119","display_name":"Marc Geilen","orcid":"https://orcid.org/0000-0002-2629-3249"},"institutions":[{"id":"https://openalex.org/I83019370","display_name":"Eindhoven University of Technology","ror":"https://ror.org/02c2kyt77","country_code":"NL","type":"education","lineage":["https://openalex.org/I83019370"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Marc Geilen","raw_affiliation_strings":["Department of Electrical Engineering, Eindhovan University of Technology, Eindhoven, Netherlands"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Eindhovan University of Technology, Eindhoven, Netherlands","institution_ids":["https://openalex.org/I83019370"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5032436846","display_name":"Sander Stuijk","orcid":"https://orcid.org/0000-0002-2518-6847"},"institutions":[{"id":"https://openalex.org/I83019370","display_name":"Eindhoven University of Technology","ror":"https://ror.org/02c2kyt77","country_code":"NL","type":"education","lineage":["https://openalex.org/I83019370"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Sander Stuijk","raw_affiliation_strings":["Department of Electrical Engineering, Eindhovan University of Technology, Eindhoven, Netherlands"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Eindhovan University of Technology, Eindhoven, Netherlands","institution_ids":["https://openalex.org/I83019370"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5025039922"],"corresponding_institution_ids":["https://openalex.org/I19820366","https://openalex.org/I4210128818"],"apc_list":null,"apc_paid":null,"fwci":3.5053,"has_fulltext":false,"cited_by_count":27,"citation_normalized_percentile":{"value":0.92931393,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"31","issue":"6","first_page":"831","last_page":"844"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/retiming","display_name":"Retiming","score":0.9906280040740967},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7075682878494263},{"id":"https://openalex.org/keywords/dataflow","display_name":"Dataflow","score":0.5922341346740723},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.5747495889663696},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.5633155703544617},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4530413746833801},{"id":"https://openalex.org/keywords/correctness","display_name":"Correctness","score":0.43251723051071167},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.08382269740104675}],"concepts":[{"id":"https://openalex.org/C41112130","wikidata":"https://www.wikidata.org/wiki/Q2146175","display_name":"Retiming","level":2,"score":0.9906280040740967},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7075682878494263},{"id":"https://openalex.org/C96324660","wikidata":"https://www.wikidata.org/wiki/Q205446","display_name":"Dataflow","level":2,"score":0.5922341346740723},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5747495889663696},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.5633155703544617},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4530413746833801},{"id":"https://openalex.org/C55439883","wikidata":"https://www.wikidata.org/wiki/Q360812","display_name":"Correctness","level":2,"score":0.43251723051071167},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.08382269740104675}],"mesh":[],"locations_count":7,"locations":[{"id":"doi:10.1109/tcad.2011.2182352","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2011.2182352","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},{"id":"pmh:oai:pure.tue.nl:openaire_cris_publications/191c468f-6ee7-4e69-97c2-ecbdf47e95a3","is_oa":false,"landing_page_url":"https://research.tue.nl/en/publications/191c468f-6ee7-4e69-97c2-ecbdf47e95a3","pdf_url":null,"source":{"id":"https://openalex.org/S4406922641","display_name":"TU/e Research Portal","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Zhu, X, Basten, T, Geilen, M C W & Stuijk, S 2012, 'Efficient retiming of multi-rate DSP algorithms', IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 31, no. 6, pp. 831-844. https://doi.org/10.1109/TCAD.2011.2182352","raw_type":"info:eu-repo/semantics/publishedVersion"},{"id":"pmh:748015","is_oa":false,"landing_page_url":"http://library.tue.nl/csp/dare/LinkToRepository.csp?recordnumber=748015","pdf_url":null,"source":{"id":"https://openalex.org/S4406923046","display_name":"TU/e Research Portal (Eindhoven University of Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"ISSN:0278-0070","raw_type":"Article / Letter to the editor"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.228.2127","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.228.2127","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.ics.ele.tue.nl/%7Etbasten/papers/retiming-tcad-final.pdf","raw_type":"text"},{"id":"pmh:oai:library.tue.nl:748015","is_oa":false,"landing_page_url":"http://repository.tue.nl/748015","pdf_url":null,"source":{"id":"https://openalex.org/S4406923046","display_name":"TU/e Research Portal (Eindhoven University of Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"ISSN:0278-0070","raw_type":"Article / Letter to the editor"},{"id":"pmh:oai:oai-pmh.tno.nl:61859","is_oa":false,"landing_page_url":"https://resolver.tno.nl/uuid:2232a1c3-61bf-487f-898f-c4591af009e9","pdf_url":null,"source":{"id":"https://openalex.org/S7407055233","display_name":"TNO Repository","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 31(6), pp. 831-844.","raw_type":"info:eu-repo/semantics/article"},{"id":"pmh:tue:oai:pure.tue.nl:publications/191c468f-6ee7-4e69-97c2-ecbdf47e95a3","is_oa":false,"landing_page_url":"https://research.tue.nl/nl/publications/191c468f-6ee7-4e69-97c2-ecbdf47e95a3","pdf_url":null,"source":{"id":"https://openalex.org/S4306401843","display_name":"Data Archiving and Networked Services (DANS)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1322597698","host_organization_name":"Royal Netherlands Academy of Arts and Sciences","host_organization_lineage":["https://openalex.org/I1322597698"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 31(6), 831 - 844. Institute of Electrical and Electronics Engineers","raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":29,"referenced_works":["https://openalex.org/W1501488688","https://openalex.org/W1537151756","https://openalex.org/W1540420197","https://openalex.org/W1860183717","https://openalex.org/W1917201943","https://openalex.org/W2013815172","https://openalex.org/W2031144446","https://openalex.org/W2033872646","https://openalex.org/W2062530062","https://openalex.org/W2062802485","https://openalex.org/W2070385897","https://openalex.org/W2087656024","https://openalex.org/W2096782987","https://openalex.org/W2102825143","https://openalex.org/W2106417701","https://openalex.org/W2113487338","https://openalex.org/W2117332593","https://openalex.org/W2119949349","https://openalex.org/W2120411167","https://openalex.org/W2120431055","https://openalex.org/W2140673616","https://openalex.org/W2146423178","https://openalex.org/W2148251313","https://openalex.org/W2169417961","https://openalex.org/W4249632768","https://openalex.org/W4254858708","https://openalex.org/W6676494795","https://openalex.org/W6677520437","https://openalex.org/W6684885144"],"related_works":["https://openalex.org/W2134549436","https://openalex.org/W233224440","https://openalex.org/W2160236198","https://openalex.org/W1951668625","https://openalex.org/W2903287280","https://openalex.org/W3140976369","https://openalex.org/W2132158474","https://openalex.org/W2161928569","https://openalex.org/W2135392710","https://openalex.org/W44831041"],"abstract_inverted_index":{"Multirate":[0],"digital":[1],"signal":[2],"processing":[3],"(DSP)":[4],"algorithms":[5],"are":[6],"often":[7],"modeled":[8],"with":[9,52],"synchronous":[10],"dataflow":[11],"graphs":[12],"(SDFGs).":[13],"A":[14],"lower":[15],"iteration":[16,42,63,75],"period":[17,43,64],"implies":[18],"a":[19,23,28,57,61,69,79,90,122],"faster":[20],"execution":[21],"of":[22],"DSP":[24],"algorithm.":[25],"Retiming":[26],"is":[27],"simple":[29],"but":[30],"efficient":[31],"graph":[32],"transformation":[33],"technique":[34],"for":[35,82,93],"performance":[36],"optimization,":[37],"which":[38],"can":[39],"decrease":[40],"the":[41,73,127],"without":[44,106],"affecting":[45],"functionality.":[46],"In":[47],"this":[48],"paper,":[49],"we":[50],"deal":[51],"two":[53],"problems:":[54],"feasible":[55,83],"retiming-retiming":[56,68],"SDFG":[58,70],"to":[59,71,110,126],"meet":[60],"given":[62],"constraint,":[65],"and":[66,85,96],"optimal":[67,94],"achieve":[72],"smallest":[74],"period.":[76],"We":[77],"present":[78],"novel":[80],"algorithm":[81,92],"retiming":[84],"based":[86],"on":[87,104],"that":[88,118],"one,":[89],"new":[91],"retiming,":[95],"prove":[97],"their":[98,111],"correctness.":[99],"Both":[100],"methods":[101,120],"work":[102],"directly":[103],"SDFGs,":[105],"explicitly":[107],"converting":[108],"them":[109],"equivalent":[112],"homogeneous":[113],"SDFGs.":[114],"Experimental":[115],"results":[116],"show":[117],"our":[119],"give":[121],"significant":[123],"improvement":[124],"compared":[125],"earlier":[128],"methods.":[129]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2024,"cited_by_count":2},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":5},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":6},{"year":2014,"cited_by_count":5},{"year":2013,"cited_by_count":1}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}