{"id":"https://openalex.org/W1992197211","doi":"https://doi.org/10.1109/tcad.2011.2170071","title":"On the Impact of Within-Die Process Variation in GALS-Based NoC Performance","display_name":"On the Impact of Within-Die Process Variation in GALS-Based NoC Performance","publication_year":2012,"publication_date":"2012-01-30","ids":{"openalex":"https://openalex.org/W1992197211","doi":"https://doi.org/10.1109/tcad.2011.2170071","mag":"1992197211"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2011.2170071","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2011.2170071","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://hdl.handle.net/10251/37054","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5047492364","display_name":"Carles Hern\u00e1ndez","orcid":"https://orcid.org/0000-0001-5393-3195"},"institutions":[{"id":"https://openalex.org/I60053951","display_name":"Universitat Polit\u00e8cnica de Val\u00e8ncia","ror":"https://ror.org/01460j859","country_code":"ES","type":"education","lineage":["https://openalex.org/I60053951"]},{"id":"https://openalex.org/I16097986","display_name":"Universitat de Val\u00e8ncia","ror":"https://ror.org/043nxc105","country_code":"ES","type":"education","lineage":["https://openalex.org/I16097986"]}],"countries":["ES"],"is_corresponding":true,"raw_author_name":"Carles Hernandez","raw_affiliation_strings":["Department of Computer Engineering, Technical University of Valencia, Valencia, Spain","Dept. of Comput. Eng., Tech. Univ. of Valencia, Valencia, Spain"],"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, Technical University of Valencia, Valencia, Spain","institution_ids":["https://openalex.org/I16097986"]},{"raw_affiliation_string":"Dept. of Comput. Eng., Tech. Univ. of Valencia, Valencia, Spain","institution_ids":["https://openalex.org/I60053951"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036026568","display_name":"Antoni Roca","orcid":null},"institutions":[{"id":"https://openalex.org/I16097986","display_name":"Universitat de Val\u00e8ncia","ror":"https://ror.org/043nxc105","country_code":"ES","type":"education","lineage":["https://openalex.org/I16097986"]},{"id":"https://openalex.org/I60053951","display_name":"Universitat Polit\u00e8cnica de Val\u00e8ncia","ror":"https://ror.org/01460j859","country_code":"ES","type":"education","lineage":["https://openalex.org/I60053951"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Antoni Roca","raw_affiliation_strings":["Department of Computer Engineering, Technical University of Valencia, Valencia, Spain","Dept. of Comput. Eng., Tech. Univ. of Valencia, Valencia, Spain"],"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, Technical University of Valencia, Valencia, Spain","institution_ids":["https://openalex.org/I16097986"]},{"raw_affiliation_string":"Dept. of Comput. Eng., Tech. Univ. of Valencia, Valencia, Spain","institution_ids":["https://openalex.org/I60053951"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050691850","display_name":"Federico Silla","orcid":"https://orcid.org/0000-0002-6435-1200"},"institutions":[{"id":"https://openalex.org/I60053951","display_name":"Universitat Polit\u00e8cnica de Val\u00e8ncia","ror":"https://ror.org/01460j859","country_code":"ES","type":"education","lineage":["https://openalex.org/I60053951"]},{"id":"https://openalex.org/I16097986","display_name":"Universitat de Val\u00e8ncia","ror":"https://ror.org/043nxc105","country_code":"ES","type":"education","lineage":["https://openalex.org/I16097986"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Federico Silla","raw_affiliation_strings":["Department of Computer Engineering, Technical University of Valencia, Valencia, Spain","Dept. of Comput. Eng., Tech. Univ. of Valencia, Valencia, Spain"],"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, Technical University of Valencia, Valencia, Spain","institution_ids":["https://openalex.org/I16097986"]},{"raw_affiliation_string":"Dept. of Comput. Eng., Tech. Univ. of Valencia, Valencia, Spain","institution_ids":["https://openalex.org/I60053951"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5046815809","display_name":"Jos\u00e9 Flich","orcid":"https://orcid.org/0000-0001-8581-6284"},"institutions":[{"id":"https://openalex.org/I60053951","display_name":"Universitat Polit\u00e8cnica de Val\u00e8ncia","ror":"https://ror.org/01460j859","country_code":"ES","type":"education","lineage":["https://openalex.org/I60053951"]},{"id":"https://openalex.org/I16097986","display_name":"Universitat de Val\u00e8ncia","ror":"https://ror.org/043nxc105","country_code":"ES","type":"education","lineage":["https://openalex.org/I16097986"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Jose Flich","raw_affiliation_strings":["Department of Computer Engineering, Technical University of Valencia, Valencia, Spain","Dept. of Comput. Eng., Tech. Univ. of Valencia, Valencia, Spain"],"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, Technical University of Valencia, Valencia, Spain","institution_ids":["https://openalex.org/I16097986"]},{"raw_affiliation_string":"Dept. of Comput. Eng., Tech. Univ. of Valencia, Valencia, Spain","institution_ids":["https://openalex.org/I60053951"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5040384183","display_name":"J. Duato","orcid":"https://orcid.org/0000-0002-7785-0607"},"institutions":[{"id":"https://openalex.org/I16097986","display_name":"Universitat de Val\u00e8ncia","ror":"https://ror.org/043nxc105","country_code":"ES","type":"education","lineage":["https://openalex.org/I16097986"]},{"id":"https://openalex.org/I60053951","display_name":"Universitat Polit\u00e8cnica de Val\u00e8ncia","ror":"https://ror.org/01460j859","country_code":"ES","type":"education","lineage":["https://openalex.org/I60053951"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Jose Duato","raw_affiliation_strings":["Department of Computer Engineering, Technical University of Valencia, Valencia, Spain","Dept. of Comput. Eng., Tech. Univ. of Valencia, Valencia, Spain"],"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, Technical University of Valencia, Valencia, Spain","institution_ids":["https://openalex.org/I16097986"]},{"raw_affiliation_string":"Dept. of Comput. Eng., Tech. Univ. of Valencia, Valencia, Spain","institution_ids":["https://openalex.org/I60053951"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5047492364"],"corresponding_institution_ids":["https://openalex.org/I16097986","https://openalex.org/I60053951"],"apc_list":null,"apc_paid":null,"fwci":0.7092,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.70919494,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"31","issue":"2","first_page":"294","last_page":"307"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.7382915019989014},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.6609988212585449},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6593963503837585},{"id":"https://openalex.org/keywords/variation","display_name":"Variation (astronomy)","score":0.6161482930183411},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5528601408004761},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5520850419998169},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4987030029296875},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.4818233549594879},{"id":"https://openalex.org/keywords/die","display_name":"Die (integrated circuit)","score":0.4801861047744751},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.4285274147987366},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4094306230545044},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09599515795707703},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.0704059898853302}],"concepts":[{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.7382915019989014},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.6609988212585449},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6593963503837585},{"id":"https://openalex.org/C2778334786","wikidata":"https://www.wikidata.org/wiki/Q1586270","display_name":"Variation (astronomy)","level":2,"score":0.6161482930183411},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5528601408004761},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5520850419998169},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4987030029296875},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.4818233549594879},{"id":"https://openalex.org/C111106434","wikidata":"https://www.wikidata.org/wiki/Q1072430","display_name":"Die (integrated circuit)","level":2,"score":0.4801861047744751},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.4285274147987366},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4094306230545044},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09599515795707703},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0704059898853302},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C44870925","wikidata":"https://www.wikidata.org/wiki/Q37547","display_name":"Astrophysics","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tcad.2011.2170071","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2011.2170071","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},{"id":"pmh:oai:riunet.upv.es:10251/37054","is_oa":true,"landing_page_url":"http://hdl.handle.net/10251/37054","pdf_url":null,"source":{"id":"https://openalex.org/S4306401500","display_name":"RiuNet (Politechnical University of Valencia)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I60053951","host_organization_name":"Universitat Polit\u00e8cnica de Val\u00e8ncia","host_organization_lineage":["https://openalex.org/I60053951"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":{"id":"pmh:oai:riunet.upv.es:10251/37054","is_oa":true,"landing_page_url":"http://hdl.handle.net/10251/37054","pdf_url":null,"source":{"id":"https://openalex.org/S4306401500","display_name":"RiuNet (Politechnical University of Valencia)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I60053951","host_organization_name":"Universitat Polit\u00e8cnica de Val\u00e8ncia","host_organization_lineage":["https://openalex.org/I60053951"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":43,"referenced_works":["https://openalex.org/W153999141","https://openalex.org/W1559789667","https://openalex.org/W1693570377","https://openalex.org/W1804063983","https://openalex.org/W1981411441","https://openalex.org/W2033443176","https://openalex.org/W2043340768","https://openalex.org/W2086202544","https://openalex.org/W2101554015","https://openalex.org/W2104151023","https://openalex.org/W2107566947","https://openalex.org/W2111563118","https://openalex.org/W2114522727","https://openalex.org/W2118015263","https://openalex.org/W2120635877","https://openalex.org/W2128433628","https://openalex.org/W2129883611","https://openalex.org/W2130861573","https://openalex.org/W2134049183","https://openalex.org/W2134944363","https://openalex.org/W2135933214","https://openalex.org/W2136994107","https://openalex.org/W2141242940","https://openalex.org/W2145252892","https://openalex.org/W2150283124","https://openalex.org/W2154054117","https://openalex.org/W2156811502","https://openalex.org/W2159856958","https://openalex.org/W2162354220","https://openalex.org/W2162897739","https://openalex.org/W2166925534","https://openalex.org/W2169875292","https://openalex.org/W2398913158","https://openalex.org/W2399983654","https://openalex.org/W2406085352","https://openalex.org/W3140261852","https://openalex.org/W3150134984","https://openalex.org/W4234308027","https://openalex.org/W4242246193","https://openalex.org/W4244034697","https://openalex.org/W4245298162","https://openalex.org/W6712789203","https://openalex.org/W6713753030"],"related_works":["https://openalex.org/W2065289416","https://openalex.org/W4863605","https://openalex.org/W2148989037","https://openalex.org/W2154356865","https://openalex.org/W2054411746","https://openalex.org/W4285287318","https://openalex.org/W2063242678","https://openalex.org/W2784141701","https://openalex.org/W1977304091","https://openalex.org/W2138821532"],"abstract_inverted_index":{"Current":[0],"integration":[1,25],"scales":[2,26],"allow":[3],"designing":[4],"chip":[5],"multiprocessors":[6],"(CMP),":[7],"where":[8],"cores":[9],"are":[10,122,158],"interconnected":[11],"by":[12,73,112],"means":[13],"of":[14,23,34,70,86,145],"a":[15,71,75,132],"network-on-chip":[16],"(NoC).":[17],"Unfortunately,":[18],"the":[19,50,62,68,142,162],"small":[20],"feature":[21],"size":[22],"current":[24],"causes":[27],"some":[28],"unpredictability":[29],"in":[30,161],"manufactured":[31],"devices":[32],"because":[33],"process":[35,106],"variation.":[36],"In":[37,56],"NoCs,":[38],"variability":[39,81,146],"may":[40],"affect":[41,67],"links":[42],"and":[43,78],"routers":[44],"causing":[45],"them":[46],"not":[47],"to":[48,83,125,140],"match":[49],"parameters":[51],"established":[52],"at":[53],"design":[54],"time.":[55,150],"this":[57,127],"paper,":[58],"we":[59,97,130],"first":[60],"analyze":[61],"way":[63],"that":[64,99],"manufacturing":[65],"deviations":[66],"components":[69],"NoC":[72,90],"applying":[74],"new":[76],"comprehensive":[77],"detailed":[79],"within-die":[80],"model":[82],"200":[84],"instances":[85],"an":[87],"8\u00d78":[88],"mesh":[89],"synthesized":[91],"using":[92,113],"45":[93],"nm":[94],"technology.":[95],"Later,":[96],"show":[98],"GALS-based":[100],"NoCs":[101],"present":[102],"communication":[103],"bottlenecks":[104],"under":[105],"variation":[107],"which":[108],"cannot":[109],"be":[110],"avoided":[111],"just":[114],"device-level":[115],"solutions":[116],"but":[117],"higher":[118],"level":[119],"architectural":[120,134],"approaches":[121],"required.":[123],"Therefore,":[124],"overcome":[126],"performance":[128,137],"reduction,":[129],"draft":[131],"novel":[133],"approach,":[135],"called":[136],"domains,":[138],"intended":[139],"reduce":[141],"negative":[143],"impact":[144],"on":[147],"application":[148],"execution":[149],"This":[151],"mechanism":[152],"is":[153],"suitable":[154],"when":[155],"several":[156],"applications":[157],"simultaneously":[159],"running":[160],"CMP":[163],"chip.":[164]},"counts_by_year":[{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2016-06-24T00:00:00"}