{"id":"https://openalex.org/W2158277795","doi":"https://doi.org/10.1109/tcad.2011.2160177","title":"Test-Architecture Optimization and Test Scheduling for TSV-Based 3-D Stacked ICs","display_name":"Test-Architecture Optimization and Test Scheduling for TSV-Based 3-D Stacked ICs","publication_year":2011,"publication_date":"2011-10-18","ids":{"openalex":"https://openalex.org/W2158277795","doi":"https://doi.org/10.1109/tcad.2011.2160177","mag":"2158277795"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2011.2160177","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2011.2160177","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5077741330","display_name":"Brandon Noia","orcid":null},"institutions":[{"id":"https://openalex.org/I170897317","display_name":"Duke University","ror":"https://ror.org/00py81415","country_code":"US","type":"education","lineage":["https://openalex.org/I170897317"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"B. Noia","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Duke University, Durham, NC, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Duke University, Durham, NC, USA","institution_ids":["https://openalex.org/I170897317"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033880864","display_name":"Krishnendu Chakrabarty","orcid":"https://orcid.org/0000-0003-4475-6435"},"institutions":[{"id":"https://openalex.org/I170897317","display_name":"Duke University","ror":"https://ror.org/00py81415","country_code":"US","type":"education","lineage":["https://openalex.org/I170897317"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"K. Chakrabarty","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Duke University, Durham, NC, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Duke University, Durham, NC, USA","institution_ids":["https://openalex.org/I170897317"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102875384","display_name":"S.K. Goel","orcid":"https://orcid.org/0009-0005-0878-8650"},"institutions":[{"id":"https://openalex.org/I170897317","display_name":"Duke University","ror":"https://ror.org/00py81415","country_code":"US","type":"education","lineage":["https://openalex.org/I170897317"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. K. Goel","raw_affiliation_strings":["Duke University, Durham, NC, USA"],"affiliations":[{"raw_affiliation_string":"Duke University, Durham, NC, USA","institution_ids":["https://openalex.org/I170897317"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044629739","display_name":"Erik Jan Marinissen","orcid":"https://orcid.org/0000-0002-5058-8303"},"institutions":[{"id":"https://openalex.org/I4210114974","display_name":"IMEC","ror":"https://ror.org/02kcbn207","country_code":"BE","type":"nonprofit","lineage":["https://openalex.org/I4210114974"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"E. J. Marinissen","raw_affiliation_strings":["3-D Integration Program, IMEC, Leuven, Belgium"],"affiliations":[{"raw_affiliation_string":"3-D Integration Program, IMEC, Leuven, Belgium","institution_ids":["https://openalex.org/I4210114974"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5083833835","display_name":"Jouke Verbree","orcid":null},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]},{"id":"https://openalex.org/I4210114974","display_name":"IMEC","ror":"https://ror.org/02kcbn207","country_code":"BE","type":"nonprofit","lineage":["https://openalex.org/I4210114974"]}],"countries":["BE","NL"],"is_corresponding":false,"raw_author_name":"J. Verbree","raw_affiliation_strings":["Department of Computer Engineering, Delft University of Technology, Delft, Netherlands","IMEC, Leuven, Belgium"],"affiliations":[{"raw_affiliation_string":"Department of Computer Engineering, Delft University of Technology, Delft, Netherlands","institution_ids":["https://openalex.org/I98358874"]},{"raw_affiliation_string":"IMEC, Leuven, Belgium","institution_ids":["https://openalex.org/I4210114974"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5077741330"],"corresponding_institution_ids":["https://openalex.org/I170897317"],"apc_list":null,"apc_paid":null,"fwci":6.0942,"has_fulltext":false,"cited_by_count":63,"citation_normalized_percentile":{"value":0.96717941,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":100},"biblio":{"volume":"30","issue":"11","first_page":"1705","last_page":"1718"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/stack","display_name":"Stack (abstract data type)","score":0.628278911113739},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.4950379431247711},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.455375999212265},{"id":"https://openalex.org/keywords/test","display_name":"Test (biology)","score":0.4543118476867676},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4260335862636566},{"id":"https://openalex.org/keywords/die","display_name":"Die (integrated circuit)","score":0.41947585344314575},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4131878614425659},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3920174539089203},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.37245461344718933},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3345206379890442},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1604716181755066},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08463773131370544},{"id":"https://openalex.org/keywords/mechanical-engineering","display_name":"Mechanical engineering","score":0.06751027703285217}],"concepts":[{"id":"https://openalex.org/C9395851","wikidata":"https://www.wikidata.org/wiki/Q177929","display_name":"Stack (abstract data type)","level":2,"score":0.628278911113739},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.4950379431247711},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.455375999212265},{"id":"https://openalex.org/C2777267654","wikidata":"https://www.wikidata.org/wiki/Q3519023","display_name":"Test (biology)","level":2,"score":0.4543118476867676},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4260335862636566},{"id":"https://openalex.org/C111106434","wikidata":"https://www.wikidata.org/wiki/Q1072430","display_name":"Die (integrated circuit)","level":2,"score":0.41947585344314575},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4131878614425659},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3920174539089203},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.37245461344718933},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3345206379890442},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1604716181755066},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08463773131370544},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.06751027703285217},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.2011.2160177","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2011.2160177","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.6299999952316284}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":39,"referenced_works":["https://openalex.org/W1666750238","https://openalex.org/W1837496673","https://openalex.org/W1987131925","https://openalex.org/W1997959089","https://openalex.org/W2002041333","https://openalex.org/W2013679798","https://openalex.org/W2016460235","https://openalex.org/W2023264348","https://openalex.org/W2046574526","https://openalex.org/W2074730724","https://openalex.org/W2075105459","https://openalex.org/W2090396476","https://openalex.org/W2095790208","https://openalex.org/W2103022917","https://openalex.org/W2103799547","https://openalex.org/W2105331022","https://openalex.org/W2107304970","https://openalex.org/W2110075134","https://openalex.org/W2114717056","https://openalex.org/W2116426145","https://openalex.org/W2121926956","https://openalex.org/W2122636510","https://openalex.org/W2125982897","https://openalex.org/W2126513855","https://openalex.org/W2132155220","https://openalex.org/W2139407027","https://openalex.org/W2143502515","https://openalex.org/W2151243068","https://openalex.org/W2151760281","https://openalex.org/W2155288938","https://openalex.org/W2161277442","https://openalex.org/W2163273848","https://openalex.org/W2165642910","https://openalex.org/W4245549415","https://openalex.org/W6673221304","https://openalex.org/W6676246538","https://openalex.org/W6681100218","https://openalex.org/W6683734590","https://openalex.org/W6683937592"],"related_works":["https://openalex.org/W2372289614","https://openalex.org/W2738154096","https://openalex.org/W2004241287","https://openalex.org/W2629813803","https://openalex.org/W2380576232","https://openalex.org/W2041067810","https://openalex.org/W2250518232","https://openalex.org/W3199170188","https://openalex.org/W2360137025","https://openalex.org/W2937054111"],"abstract_inverted_index":{"Through-silicon":[0],"via":[1],"(TSV)-based":[2],"3-D":[3,24,35,74],"stacked":[4,25],"ICs":[5,26],"(SICs)":[6],"are":[7,42,156],"becoming":[8],"increasingly":[9],"important":[10],"in":[11,106,136,143,166,180,183,196],"the":[12,62,82,91,99,118,126,144,160,167,192,197],"semiconductor":[13],"industry.":[14],"In":[15],"this":[16],"paper,":[17],"we":[18,150],"address":[19],"test":[20,39,85,107,114,119,129,137,147,154,172,200],"architecture":[21,63],"optimization":[22,64],"for":[23,61,66,71],"implemented":[27],"using":[28,208],"TSVs.":[29,148],"We":[30,51,121],"consider":[31],"two":[32],"cases,":[33],"namely":[34],"SICs":[36,75],"with":[37,159,191],"die-level":[38],"architectures":[40],"that":[41,88,124,152],"either":[43],"fixed":[44],"or":[45],"still":[46],"need":[47],"to":[48,57,90,140,185,205],"be":[49,203],"designed.":[50],"next":[52],"present":[53],"mathematical":[54],"programming":[55],"techniques":[56],"derive":[58],"optimal":[59,113],"solutions":[60,101],"problem":[65],"both":[67],"cases.":[68],"Experimental":[69],"results":[70],"three":[72],"handcrafted":[73],"comprising":[76],"of":[77,94,128,146],"various":[78],"systems-on-a-chip":[79],"(SoCs)":[80],"from":[81],"ITC'02":[83],"SoC":[84],"benchmarks":[86],"show":[87,123,151],"compared":[89,139],"baseline":[92],"method":[93],"sequentially":[95],"testing":[96],"all":[97],"dies,":[98],"proposed":[100],"can":[102],"achieve":[103],"significant":[104],"reduction":[105,135],"length.":[108],"This":[109,169],"is":[110,170],"achieved":[111,158],"through":[112,176],"schedules":[115],"enabled":[116],"by":[117],"architecture.":[120],"also":[122],"increasing":[125],"number":[127,145],"pins":[130],"typically":[131],"provides":[132],"a":[133,181],"greater":[134],"length":[138],"an":[141],"increase":[142],"Furthermore,":[149],"shorter":[153],"lengths":[155],"generally":[157],"larger,":[161],"more":[162,199],"complex":[163],"dies":[164,194,207],"lower":[165,179,195],"stack.":[168],"because":[171],"data":[173],"must":[174],"pass":[175],"every":[177],"die":[178],"stack":[182],"order":[184],"reach":[186],"its":[187],"target":[188],"die,":[189],"and":[190],"larger":[193],"stack,":[198],"bandwidth":[201],"may":[202],"provided":[204],"these":[206],"fewer":[209],"routing":[210],"resources.":[211]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":4},{"year":2016,"cited_by_count":7},{"year":2015,"cited_by_count":18},{"year":2014,"cited_by_count":8},{"year":2013,"cited_by_count":9},{"year":2012,"cited_by_count":4}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}