{"id":"https://openalex.org/W1983213480","doi":"https://doi.org/10.1109/tcad.2011.2138470","title":"Generation of Multi-Cycle Broadside Tests","display_name":"Generation of Multi-Cycle Broadside Tests","publication_year":2011,"publication_date":"2011-07-21","ids":{"openalex":"https://openalex.org/W1983213480","doi":"https://doi.org/10.1109/tcad.2011.2138470","mag":"1983213480"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2011.2138470","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2011.2138470","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5032651920","display_name":"Irith Pomeranz","orcid":"https://orcid.org/0000-0002-5491-7282"},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Irith Pomeranz","raw_affiliation_strings":["School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","Sch. of Electr. & Comput. engineering, Purdue Univ., West Lafayette, IN, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]},{"raw_affiliation_string":"Sch. of Electr. & Comput. engineering, Purdue Univ., West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5032651920"],"corresponding_institution_ids":["https://openalex.org/I219193219"],"apc_list":null,"apc_paid":null,"fwci":2.2668,"has_fulltext":false,"cited_by_count":20,"citation_normalized_percentile":{"value":0.88317266,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"30","issue":"8","first_page":"1253","last_page":"1257"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9954000115394592,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/broadside","display_name":"Broadside","score":0.955581545829773},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.6027724146842957},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5550920963287354},{"id":"https://openalex.org/keywords/test-set","display_name":"Test set","score":0.5265030264854431},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.45631465315818787},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.43502703309059143},{"id":"https://openalex.org/keywords/test","display_name":"Test (biology)","score":0.41266098618507385},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.15541476011276245},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.09143933653831482},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.07721570134162903}],"concepts":[{"id":"https://openalex.org/C57130246","wikidata":"https://www.wikidata.org/wiki/Q849965","display_name":"Broadside","level":2,"score":0.955581545829773},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.6027724146842957},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5550920963287354},{"id":"https://openalex.org/C169903167","wikidata":"https://www.wikidata.org/wiki/Q3985153","display_name":"Test set","level":2,"score":0.5265030264854431},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.45631465315818787},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.43502703309059143},{"id":"https://openalex.org/C2777267654","wikidata":"https://www.wikidata.org/wiki/Q3519023","display_name":"Test (biology)","level":2,"score":0.41266098618507385},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.15541476011276245},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.09143933653831482},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.07721570134162903},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C120665830","wikidata":"https://www.wikidata.org/wiki/Q14620","display_name":"Optics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.2011.2138470","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2011.2138470","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/16","score":0.46000000834465027,"display_name":"Peace, Justice and strong institutions"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W1568407911","https://openalex.org/W1902443706","https://openalex.org/W2007255031","https://openalex.org/W2055179355","https://openalex.org/W2069520100","https://openalex.org/W2074302528","https://openalex.org/W2096146619","https://openalex.org/W2100665647","https://openalex.org/W2104955033","https://openalex.org/W2106585148","https://openalex.org/W2118204515","https://openalex.org/W2118744758","https://openalex.org/W2124578543","https://openalex.org/W2127079967","https://openalex.org/W2145300792","https://openalex.org/W2164754947","https://openalex.org/W2167375935","https://openalex.org/W4239144429","https://openalex.org/W4254201402"],"related_works":["https://openalex.org/W4307513436","https://openalex.org/W2012969487","https://openalex.org/W4283778528","https://openalex.org/W4307441381","https://openalex.org/W2154177135","https://openalex.org/W2914448942","https://openalex.org/W2252747487","https://openalex.org/W4307413935","https://openalex.org/W3158697290","https://openalex.org/W4318718858"],"abstract_inverted_index":{"The":[0,86],"use":[1],"of":[2,14,25,49,73,98,108,119],"multi-cycle":[3],"(or":[4],"multi-pattern)":[5],"tests":[6],"for":[7,18,43,57,81,128],"delay":[8,31],"faults":[9],"can":[10],"reduce":[11],"the":[12,23,38,69,74,96,106,117,125],"number":[13,97,107],"clock":[15,45,71,120],"cycles":[16,46,72,121],"required":[17],"test":[19,27,91,103,134],"application,":[20],"and":[21,131],"enhance":[22],"ability":[24],"a":[26,79,89],"set":[28,92],"to":[29,94],"detect":[30],"defects.":[32],"This":[33,52,76],"is":[34,54],"achieved":[35],"by":[36],"exercising":[37],"circuit":[39],"in":[40,101,116],"functional":[41,59,65,70,130],"mode":[42],"several":[44],"as":[47],"part":[48],"each":[50,102],"test.":[51,75],"advantage":[53],"especially":[55],"important":[56],"multi-pattern":[58,83],"broadside":[60,84,133],"tests,":[61],"which":[62],"guarantee":[63],"normal":[64],"operation":[66],"conditions":[67],"during":[68],"paper":[77],"describes":[78],"procedure":[80,87,127],"generating":[82],"tests.":[85,109],"extends":[88],"two-pattern":[90],"gradually":[93],"increase":[95],"patterns":[99],"included":[100],"while":[104],"reducing":[105],"Experimental":[110],"results":[111],"demonstrate":[112],"that":[113],"significant":[114],"reductions":[115],"numbers":[118],"are":[122],"possible":[123],"with":[124],"proposed":[126],"both":[129],"arbitrary":[132],"sets.":[135]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":5},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
