{"id":"https://openalex.org/W2126672869","doi":"https://doi.org/10.1109/tcad.2010.2095650","title":"Transient Analysis of CMOS-Gate-Driven $RLGC$ Interconnects Based on FDTD","display_name":"Transient Analysis of CMOS-Gate-Driven $RLGC$ Interconnects Based on FDTD","publication_year":2011,"publication_date":"2011-03-22","ids":{"openalex":"https://openalex.org/W2126672869","doi":"https://doi.org/10.1109/tcad.2010.2095650","mag":"2126672869"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2010.2095650","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2010.2095650","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100413904","display_name":"Xiao\u2010Chun Li","orcid":"https://orcid.org/0000-0003-1455-2095"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Xiao-Chun Li","raw_affiliation_strings":["Department of Electronic Engineering, Shanghai Jiaotong University, Shanghai, China","[Dept. of Electron. Eng., Shanghai Jiaotong Univ., Shanghai, China]"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, Shanghai Jiaotong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]},{"raw_affiliation_string":"[Dept. of Electron. Eng., Shanghai Jiaotong Univ., Shanghai, China]","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036116982","display_name":"Junfa Mao","orcid":"https://orcid.org/0000-0002-9857-535X"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jun-Fa Mao","raw_affiliation_strings":["Department of Electronic Engineering, Shanghai Jiaotong University, Shanghai, China","[Dept. of Electron. Eng., Shanghai Jiaotong Univ., Shanghai, China]"],"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, Shanghai Jiaotong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]},{"raw_affiliation_string":"[Dept. of Electron. Eng., Shanghai Jiaotong Univ., Shanghai, China]","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5085554167","display_name":"Madhavan Swaminathan","orcid":"https://orcid.org/0000-0003-1729-2807"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Madhavan Swaminathan","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","Sch. of Electr. & Comput. Eng.,, Georgia Inst. of Technol., Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]},{"raw_affiliation_string":"Sch. of Electr. & Comput. Eng.,, Georgia Inst. of Technol., Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5100413904"],"corresponding_institution_ids":["https://openalex.org/I183067930"],"apc_list":null,"apc_paid":null,"fwci":3.1796,"has_fulltext":false,"cited_by_count":60,"citation_normalized_percentile":{"value":0.92358867,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":94,"max":99},"biblio":{"volume":"30","issue":"4","first_page":"574","last_page":"583"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11263","display_name":"Electromagnetic Simulation and Numerical Methods","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12495","display_name":"Electrostatic Discharge in Electronics","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7316598296165466},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.6203948259353638},{"id":"https://openalex.org/keywords/finite-difference-time-domain-method","display_name":"Finite-difference time-domain method","score":0.5428085923194885},{"id":"https://openalex.org/keywords/nonlinear-system","display_name":"Nonlinear system","score":0.4992103576660156},{"id":"https://openalex.org/keywords/time-domain","display_name":"Time domain","score":0.42925670742988586},{"id":"https://openalex.org/keywords/signal-integrity","display_name":"Signal integrity","score":0.42344918847084045},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.4100061058998108},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3745243549346924},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3517058491706848},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.14240023493766785},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.10447496175765991}],"concepts":[{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7316598296165466},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6203948259353638},{"id":"https://openalex.org/C184880428","wikidata":"https://www.wikidata.org/wiki/Q1417308","display_name":"Finite-difference time-domain method","level":2,"score":0.5428085923194885},{"id":"https://openalex.org/C158622935","wikidata":"https://www.wikidata.org/wiki/Q660848","display_name":"Nonlinear system","level":2,"score":0.4992103576660156},{"id":"https://openalex.org/C103824480","wikidata":"https://www.wikidata.org/wiki/Q185889","display_name":"Time domain","level":2,"score":0.42925670742988586},{"id":"https://openalex.org/C44938667","wikidata":"https://www.wikidata.org/wiki/Q4503810","display_name":"Signal integrity","level":3,"score":0.42344918847084045},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.4100061058998108},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3745243549346924},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3517058491706848},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.14240023493766785},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.10447496175765991},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.2010.2095650","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2010.2095650","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5799999833106995,"id":"https://metadata.un.org/sdg/16","display_name":"Peace, Justice and strong institutions"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":49,"referenced_works":["https://openalex.org/W1493750109","https://openalex.org/W1582934392","https://openalex.org/W1929174693","https://openalex.org/W1990679103","https://openalex.org/W2086903354","https://openalex.org/W2097767872","https://openalex.org/W2098671297","https://openalex.org/W2099693095","https://openalex.org/W2102292158","https://openalex.org/W2104470240","https://openalex.org/W2108368155","https://openalex.org/W2109731446","https://openalex.org/W2112354112","https://openalex.org/W2114164196","https://openalex.org/W2118464853","https://openalex.org/W2120530870","https://openalex.org/W2121793199","https://openalex.org/W2122608783","https://openalex.org/W2122917849","https://openalex.org/W2126980692","https://openalex.org/W2127012121","https://openalex.org/W2129630343","https://openalex.org/W2129641487","https://openalex.org/W2130061614","https://openalex.org/W2133365606","https://openalex.org/W2134067926","https://openalex.org/W2136746149","https://openalex.org/W2137544658","https://openalex.org/W2137685504","https://openalex.org/W2137743113","https://openalex.org/W2139032741","https://openalex.org/W2142660660","https://openalex.org/W2142896025","https://openalex.org/W2143096499","https://openalex.org/W2145500236","https://openalex.org/W2146076167","https://openalex.org/W2153203942","https://openalex.org/W2154363431","https://openalex.org/W2157024459","https://openalex.org/W2162219199","https://openalex.org/W2164833771","https://openalex.org/W2165208933","https://openalex.org/W2166109397","https://openalex.org/W2168062015","https://openalex.org/W2168067438","https://openalex.org/W2172268513","https://openalex.org/W3103339143","https://openalex.org/W6629460297","https://openalex.org/W6677134522"],"related_works":["https://openalex.org/W2044904198","https://openalex.org/W2119478278","https://openalex.org/W2965679811","https://openalex.org/W2009700418","https://openalex.org/W3150364945","https://openalex.org/W1985044448","https://openalex.org/W2982611369","https://openalex.org/W1520075683","https://openalex.org/W2058963845","https://openalex.org/W2188487172"],"abstract_inverted_index":{"As":[0],"the":[1,43,76,79,97,118,127,136,142,148,154,166],"feature":[2],"size":[3],"of":[4,17,71,78,82,108,126,141,186],"integrated":[5],"circuits":[6],"shrinking":[7],"in":[8,34,56,75,132,192],"deep":[9],"submicron":[10],"technologies,":[11],"time":[12,133,187],"delay,":[13],"and":[14,45,96,130,152,172,189],"crosstalk":[15,190],"noise":[16,191],"complementary":[18],"metal-oxide-semiconductor":[19],"(CMOS)-gate-driven":[20],"interconnects":[21],"become":[22],"critical":[23],"issues.":[24],"Traditionally,":[25],"CMOS":[26,83,109],"driver":[27],"is":[28,39,50,91,111,156,181],"simplified":[29],"as":[30],"a":[31,36,63],"linear":[32,124],"circuit":[33],"which":[35,49],"constant":[37],"resistance":[38],"used":[40,92],"to":[41,177],"approximate":[42],"nonlinear":[44,80,106],"time-varying":[46],"MOS":[47],"resistance,":[48],"inaccurate":[51],"for":[52,68,93,135,183],"signal":[53],"integrity":[54],"analysis":[55,70,95],"high-speed":[57,193],"interconnect":[58,94,194],"systems.":[59,195],"This":[60],"paper":[61],"proposes":[62],"finite-difference":[64],"time-domain":[65],"(FDTD)-based":[66],"method":[67,168],"transient":[69],"lossy":[72],"transmission":[73],"lines":[74],"presence":[77],"behavior":[81,107],"gates.":[84],"The":[85,105],"conventional":[86],"FDTD":[87,137],"with":[88,99,117,175],"second-order":[89],"accuracy":[90,171],"parameters":[98],"frequency-dependent":[100],"losses":[101],"are":[102,145],"also":[103],"included.":[104],"gates":[110],"represented":[112],"by":[113,122,159],"alpha-power":[114],"law":[115],"model,":[116],"drain":[119,128],"current":[120],"described":[121],"piecewise":[123],"function":[125],"voltage":[129],"discretized":[131],"domain":[134],"implementation.":[138],"Explicit":[139],"forms":[140],"boundary":[143],"conditions":[144],"derived":[146],"from":[147],"implicit":[149],"interface":[150],"equations":[151],"hence":[153],"stability":[155],"strictly":[157],"constrained":[158],"Courant":[160],"condition.":[161],"Experimental":[162],"results":[163],"show":[164],"that":[165],"proposed":[167],"has":[169],"good":[170],"high":[173],"efficiency":[174],"respect":[176],"HSPICE.":[178],"Therefore,":[179],"it":[180],"useful":[182],"accurate":[184],"prediction":[185],"delay":[188]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":4},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":5},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":12},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":6},{"year":2015,"cited_by_count":4},{"year":2014,"cited_by_count":4},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":5}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
