{"id":"https://openalex.org/W2131294565","doi":"https://doi.org/10.1109/tcad.2010.2071250","title":"Hierarchical Analog/Mixed-Signal Circuit Optimization Under Process Variations and Tuning","display_name":"Hierarchical Analog/Mixed-Signal Circuit Optimization Under Process Variations and Tuning","publication_year":2011,"publication_date":"2011-01-17","ids":{"openalex":"https://openalex.org/W2131294565","doi":"https://doi.org/10.1109/tcad.2010.2071250","mag":"2131294565"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2010.2071250","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2010.2071250","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5053841201","display_name":"Guo Yu","orcid":"https://orcid.org/0000-0003-2427-8202"},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Guo Yu","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Texas A and M University, College Station, TX, USA","Dept. of Electr. & Comput. Eng, Texas A&M Univ., College Station, TX, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Texas A and M University, College Station, TX, USA","institution_ids":["https://openalex.org/I91045830"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng, Texas A&M Univ., College Station, TX, USA","institution_ids":["https://openalex.org/I91045830"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100432782","display_name":"Peng Li","orcid":"https://orcid.org/0000-0003-3548-4589"},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Peng Li","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Texas A and M University, College Station, TX, USA","Dept. of Electr. & Comput. Eng, Texas A&M Univ., College Station, TX, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Texas A and M University, College Station, TX, USA","institution_ids":["https://openalex.org/I91045830"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng, Texas A&M Univ., College Station, TX, USA","institution_ids":["https://openalex.org/I91045830"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5053841201"],"corresponding_institution_ids":["https://openalex.org/I91045830"],"apc_list":null,"apc_paid":null,"fwci":2.3847,"has_fulltext":false,"cited_by_count":19,"citation_normalized_percentile":{"value":0.89662209,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"30","issue":"2","first_page":"313","last_page":"317"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10848","display_name":"Advanced Multi-Objective Optimization Algorithms","score":0.9972000122070312,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/design-for-manufacturability","display_name":"Design for manufacturability","score":0.6667197346687317},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.5478087663650513},{"id":"https://openalex.org/keywords/mixed-signal-integrated-circuit","display_name":"Mixed-signal integrated circuit","score":0.5310248136520386},{"id":"https://openalex.org/keywords/multi-objective-optimization","display_name":"Multi-objective optimization","score":0.5248620510101318},{"id":"https://openalex.org/keywords/pareto-principle","display_name":"Pareto principle","score":0.5098642706871033},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.50026535987854},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.489289253950119},{"id":"https://openalex.org/keywords/optimization-problem","display_name":"Optimization problem","score":0.46798038482666016},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3776848018169403},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.36734676361083984},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.3176027536392212},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.255007266998291},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.14549309015274048},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.13979077339172363}],"concepts":[{"id":"https://openalex.org/C62064638","wikidata":"https://www.wikidata.org/wiki/Q553878","display_name":"Design for manufacturability","level":2,"score":0.6667197346687317},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.5478087663650513},{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.5310248136520386},{"id":"https://openalex.org/C68781425","wikidata":"https://www.wikidata.org/wiki/Q2052203","display_name":"Multi-objective optimization","level":2,"score":0.5248620510101318},{"id":"https://openalex.org/C137635306","wikidata":"https://www.wikidata.org/wiki/Q182667","display_name":"Pareto principle","level":2,"score":0.5098642706871033},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.50026535987854},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.489289253950119},{"id":"https://openalex.org/C137836250","wikidata":"https://www.wikidata.org/wiki/Q984063","display_name":"Optimization problem","level":2,"score":0.46798038482666016},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3776848018169403},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.36734676361083984},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.3176027536392212},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.255007266998291},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.14549309015274048},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.13979077339172363},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.2010.2071250","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2010.2071250","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1595067400","https://openalex.org/W2003843809","https://openalex.org/W2005596987","https://openalex.org/W2105214055","https://openalex.org/W2117564662","https://openalex.org/W2118269375","https://openalex.org/W2130788193","https://openalex.org/W2140823559","https://openalex.org/W2140825526","https://openalex.org/W2144022836","https://openalex.org/W2144093346","https://openalex.org/W2147120117","https://openalex.org/W2155076421","https://openalex.org/W2171634514","https://openalex.org/W3142762472","https://openalex.org/W3144874526","https://openalex.org/W3147983963","https://openalex.org/W4230807670","https://openalex.org/W6675603290","https://openalex.org/W6682891589"],"related_works":["https://openalex.org/W2095646370","https://openalex.org/W2031235560","https://openalex.org/W2090178682","https://openalex.org/W2001591765","https://openalex.org/W4241467429","https://openalex.org/W2073147994","https://openalex.org/W2384474142","https://openalex.org/W3083133203","https://openalex.org/W1588199609","https://openalex.org/W2161335888"],"abstract_inverted_index":{"A":[0],"hierarchical":[1,111],"optimization":[2,18,77,98,112],"methodology":[3,107],"is":[4,25,53,93,100,108],"presented":[5,106],"to":[6],"achieve":[7],"robust":[8],"analog/mixed-signal":[9],"circuit":[10,21],"design":[11],"with":[12],"consideration":[13],"of":[14,33,113,118],"process":[15],"variations.":[16],"Hierarchical":[17],"using":[19],"building":[20,72,120],"block":[22,73],"Pareto":[23,67],"models":[24],"an":[26],"efficient":[27],"approach":[28],"for":[29,46,61,102],"optimizing":[30],"nominal":[31],"performances":[32],"large":[34],"analog":[35],"circuits.":[36],"However,":[37],"yield-aware":[38,66,76],"system":[39,82,91],"optimization,":[40],"as":[41],"dictated":[42],"by":[43,110],"the":[44,71,81,96],"need":[45],"safeguarding":[47],"chip":[48],"manufacturability":[49],"in":[50,88],"scaled":[51],"technologies,":[52],"completely":[54],"nontrivial.":[55],"Two":[56],"fundamental":[57],"difficulties":[58],"are":[59],"addressed":[60],"achieving":[62],"such":[63,103],"a":[64,114],"methodology:":[65],"performance":[68],"characterization":[69],"at":[70,80],"level":[74],"and":[75,95,122],"problem":[78],"formulation":[79],"level.":[83],"In":[84],"addition,":[85],"postsilicon":[86],"tuning":[87],"complex":[89],"mixed-signal":[90],"designs":[92],"investigated":[94],"proposed":[97],"framework":[99],"extended":[101],"systems.":[104],"The":[105],"demonstrated":[109],"phased-locked":[115],"loop":[116],"consisting":[117],"multiple":[119],"blocks":[121],"self-tuning":[123],"function":[124],"blocks.":[125]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":4}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}