{"id":"https://openalex.org/W2105057016","doi":"https://doi.org/10.1109/tcad.2010.2061530","title":"Exploring FPGA Routing Architecture Stochastically","display_name":"Exploring FPGA Routing Architecture Stochastically","publication_year":2010,"publication_date":"2010-09-22","ids":{"openalex":"https://openalex.org/W2105057016","doi":"https://doi.org/10.1109/tcad.2010.2061530","mag":"2105057016"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2010.2061530","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2010.2061530","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5060908808","display_name":"Mingjie Lin","orcid":"https://orcid.org/0000-0002-3225-4406"},"institutions":[{"id":"https://openalex.org/I95457486","display_name":"University of California, Berkeley","ror":"https://ror.org/01an7q238","country_code":"US","type":"education","lineage":["https://openalex.org/I95457486"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Mingjie Lin","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, University of California, Berkeley, CA, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, University of California, Berkeley, CA, USA","institution_ids":["https://openalex.org/I95457486"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044520704","display_name":"John Wawrzynek","orcid":"https://orcid.org/0009-0003-1466-4553"},"institutions":[{"id":"https://openalex.org/I4210151627","display_name":"National Energy Research Scientific Computing Center","ror":"https://ror.org/05v3mvq14","country_code":"US","type":"facility","lineage":["https://openalex.org/I1330989302","https://openalex.org/I148283060","https://openalex.org/I39565521","https://openalex.org/I4210151627"]},{"id":"https://openalex.org/I148283060","display_name":"Lawrence Berkeley National Laboratory","ror":"https://ror.org/02jbv0t02","country_code":"US","type":"facility","lineage":["https://openalex.org/I1330989302","https://openalex.org/I148283060","https://openalex.org/I39565521"]},{"id":"https://openalex.org/I95457486","display_name":"University of California, Berkeley","ror":"https://ror.org/01an7q238","country_code":"US","type":"education","lineage":["https://openalex.org/I95457486"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"John Wawrzynek","raw_affiliation_strings":["NERSC Division, Lawrence Berkeley National Laboratory, Berkeley, CA, USA","University of California, Berkeley, CA, USA"],"affiliations":[{"raw_affiliation_string":"NERSC Division, Lawrence Berkeley National Laboratory, Berkeley, CA, USA","institution_ids":["https://openalex.org/I148283060","https://openalex.org/I4210151627"]},{"raw_affiliation_string":"University of California, Berkeley, CA, USA","institution_ids":["https://openalex.org/I95457486"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5078716556","display_name":"Abbas El Gamal","orcid":"https://orcid.org/0000-0002-0853-0415"},"institutions":[{"id":"https://openalex.org/I4210137306","display_name":"Stanford Medicine","ror":"https://ror.org/03mtd9a03","country_code":"US","type":"healthcare","lineage":["https://openalex.org/I4210137306","https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Abbas El Gamal","raw_affiliation_strings":["School of Engineering, Stanford Faculty, Stanford, CA, USA"],"affiliations":[{"raw_affiliation_string":"School of Engineering, Stanford Faculty, Stanford, CA, USA","institution_ids":["https://openalex.org/I4210137306"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5060908808"],"corresponding_institution_ids":["https://openalex.org/I95457486"],"apc_list":null,"apc_paid":null,"fwci":0.2941,"has_fulltext":false,"cited_by_count":23,"citation_normalized_percentile":{"value":0.65432138,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":98},"biblio":{"volume":"29","issue":"10","first_page":"1509","last_page":"1522"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.7568192481994629},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6996948719024658},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.6633054614067078},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.6535139679908752},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5486924052238464},{"id":"https://openalex.org/keywords/metric","display_name":"Metric (unit)","score":0.4806148409843445},{"id":"https://openalex.org/keywords/metrics","display_name":"Metrics","score":0.47705283761024475},{"id":"https://openalex.org/keywords/performance-metric","display_name":"Performance metric","score":0.4672142565250397},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3747234344482422},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.34933722019195557},{"id":"https://openalex.org/keywords/static-routing","display_name":"Static routing","score":0.3021167516708374},{"id":"https://openalex.org/keywords/routing-protocol","display_name":"Routing protocol","score":0.2464022934436798},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1566164195537567}],"concepts":[{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.7568192481994629},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6996948719024658},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.6633054614067078},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.6535139679908752},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5486924052238464},{"id":"https://openalex.org/C176217482","wikidata":"https://www.wikidata.org/wiki/Q860554","display_name":"Metric (unit)","level":2,"score":0.4806148409843445},{"id":"https://openalex.org/C195780805","wikidata":"https://www.wikidata.org/wiki/Q1535986","display_name":"Metrics","level":5,"score":0.47705283761024475},{"id":"https://openalex.org/C2780898871","wikidata":"https://www.wikidata.org/wiki/Q860554","display_name":"Performance metric","level":2,"score":0.4672142565250397},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3747234344482422},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.34933722019195557},{"id":"https://openalex.org/C204948658","wikidata":"https://www.wikidata.org/wiki/Q1119410","display_name":"Static routing","level":4,"score":0.3021167516708374},{"id":"https://openalex.org/C104954878","wikidata":"https://www.wikidata.org/wiki/Q1648707","display_name":"Routing protocol","level":3,"score":0.2464022934436798},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1566164195537567},{"id":"https://openalex.org/C187736073","wikidata":"https://www.wikidata.org/wiki/Q2920921","display_name":"Management","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tcad.2010.2061530","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2010.2061530","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.261.312","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.261.312","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://http.cs.berkeley.edu/%7Ejohnw/papers/TCAD-2010-2.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.5400000214576721,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":43,"referenced_works":["https://openalex.org/W60769399","https://openalex.org/W1512959052","https://openalex.org/W1522950391","https://openalex.org/W1523051745","https://openalex.org/W1563333244","https://openalex.org/W1968031127","https://openalex.org/W2007049691","https://openalex.org/W2024060531","https://openalex.org/W2039624953","https://openalex.org/W2045617353","https://openalex.org/W2060196707","https://openalex.org/W2069345435","https://openalex.org/W2097521167","https://openalex.org/W2098608533","https://openalex.org/W2101302701","https://openalex.org/W2108880814","https://openalex.org/W2115150830","https://openalex.org/W2115596773","https://openalex.org/W2116349445","https://openalex.org/W2120080263","https://openalex.org/W2120763018","https://openalex.org/W2124752818","https://openalex.org/W2133712953","https://openalex.org/W2139637699","https://openalex.org/W2141248063","https://openalex.org/W2143244742","https://openalex.org/W2144853876","https://openalex.org/W2150098004","https://openalex.org/W2154941994","https://openalex.org/W2159741920","https://openalex.org/W2163738067","https://openalex.org/W2281254426","https://openalex.org/W3147517101","https://openalex.org/W3172772885","https://openalex.org/W4231517135","https://openalex.org/W4236875804","https://openalex.org/W4241106279","https://openalex.org/W4241239131","https://openalex.org/W6602396693","https://openalex.org/W6630495663","https://openalex.org/W6677456195","https://openalex.org/W6681220125","https://openalex.org/W6683184667"],"related_works":["https://openalex.org/W2102980025","https://openalex.org/W4282568311","https://openalex.org/W3134665879","https://openalex.org/W4313484792","https://openalex.org/W2951473296","https://openalex.org/W2883928845","https://openalex.org/W2102561972","https://openalex.org/W4288420200","https://openalex.org/W2085445946","https://openalex.org/W3145095675"],"abstract_inverted_index":{"This":[0],"paper":[1,48],"proposes":[2],"a":[3,105],"systematic":[4],"strategy":[5,177],"to":[6,23,27,62,156,196,280],"efficiently":[7],"explore":[8],"the":[9,54,64,69,75,78,84,94,113,122,158,164,174,191,197,219,234,240,252,269,285],"design":[10,41,176],"space":[11],"of":[12,46,68,77,107,125,166,199,209,224,271,284],"field-programmable":[13],"gate":[14],"array":[15],"(FPGA)":[16],"routing":[17,35,88,114,184,193,259,286],"architectures.":[18],"The":[19,43],"key":[20],"idea":[21],"is":[22,49,61,178],"use":[24],"stochastic":[25,80,175],"methods":[26],"quickly":[28],"locate":[29],"near-optimal":[30],"solutions":[31],"in":[32,181,213,256,288],"designing":[33],"FPGA":[34,101,258],"architectures":[36],"without":[37],"exhaustively":[38],"enumerating":[39],"all":[40],"points.":[42],"main":[44],"objective":[45],"this":[47],"not":[50],"as":[51,59,141],"much":[52],"about":[53],"specific":[55],"numerical":[56],"results":[57,170],"obtained,":[58],"it":[60],"show":[63],"applicability":[65],"and":[66,97,104,117,133,149,162,187,211,215,229,231],"effectiveness":[67],"proposed":[70,79],"optimization":[71],"approach.":[72],"To":[73],"demonstrate":[74,268],"utility":[76],"approach,":[81],"we":[82,249,267],"developed":[83,155],"tool":[85],"for":[86,218,233],"optimizing":[87],"architecture":[89,102,202,287],"(TORCH)":[90],"software":[91],"based":[92],"on":[93],"versatile":[95],"place":[96],"route":[98],"tool.":[99,247],"Given":[100],"parameters":[103],"set":[106],"benchmark":[108,135,227,236],"designs,":[109,228],"TORCH":[110,204,272,276],"simultaneously":[111],"optimizes":[112],"channel":[115,185,260],"segmentation":[116,186],"switch":[118,188],"box":[119],"patterns":[120],"using":[121],"performance":[123,198],"metric":[124,151],"average":[126,207,253],"interconnect":[127],"power-delay":[128],"product":[129],"estimated":[130],"from":[131],"placed":[132],"routed":[134],"designs.":[136],"Special":[137],"techniques":[138],"-":[139,153],"such":[140],"incremental":[142],"routing,":[143],"infrequent":[144],"placement,":[145],"multi-modal":[146],"move":[147],"selection,":[148],"parallelized":[150],"evaluation":[152],"are":[154],"reduce":[157],"overall":[159],"run":[160],"time":[161],"improve":[163],"quality":[165],"results.":[167],"Our":[168],"experimental":[169],"have":[171],"shown":[172],"that":[173,251],"quite":[179],"effective":[180],"co-optimizing":[182],"both":[183],"patterns.":[189],"With":[190],"optimized":[192],"architecture,":[194],"relative":[195],"our":[200],"chosen":[201],"baseline,":[203],"can":[205,277],"achieve":[206],"improvements":[208],"24%":[210],"15%":[212],"delay":[214],"power":[216],"consumption":[217],"20":[220],"largest":[221],"Microelectronics":[222],"Center":[223],"North":[225],"Carolina":[226],"27%":[230],"21%":[232],"eight":[235],"designs":[237],"synthesized":[238],"with":[239,263],"Altera":[241],"Quartus":[242],"II":[243],"University":[244],"Interface":[245],"Program":[246],"Additionally,":[248],"found":[250],"segment":[254],"length":[255],"an":[257,289],"should":[261],"decrease":[262],"technology":[264],"scaling.":[265],"Finally,":[266],"versatility":[270],"by":[273],"illustrating":[274],"how":[275],"be":[278],"used":[279],"optimize":[281],"other":[282],"aspects":[283],"FPGA.":[290]},"counts_by_year":[{"year":2025,"cited_by_count":5},{"year":2024,"cited_by_count":5},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":2},{"year":2018,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}