{"id":"https://openalex.org/W2141184219","doi":"https://doi.org/10.1109/tcad.2010.2048594","title":"A Reconfigurable Source-Synchronous On-Chip Network for GALS Many-Core Platforms","display_name":"A Reconfigurable Source-Synchronous On-Chip Network for GALS Many-Core Platforms","publication_year":2010,"publication_date":"2010-05-28","ids":{"openalex":"https://openalex.org/W2141184219","doi":"https://doi.org/10.1109/tcad.2010.2048594","mag":"2141184219"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2010.2048594","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2010.2048594","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5060594077","display_name":"Anh Tran","orcid":null},"institutions":[{"id":"https://openalex.org/I84218800","display_name":"University of California, Davis","ror":"https://ror.org/05rrcem69","country_code":"US","type":"education","lineage":["https://openalex.org/I84218800"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Anh Thien Tran","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of California, Davis, CA, USA","Dept. of Electr. & Comput. Eng., Univ. of California, Davis, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of California, Davis, CA, USA","institution_ids":["https://openalex.org/I84218800"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Univ. of California, Davis, CA, USA","institution_ids":["https://openalex.org/I84218800"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111922010","display_name":"Dean N. Truong","orcid":null},"institutions":[{"id":"https://openalex.org/I84218800","display_name":"University of California, Davis","ror":"https://ror.org/05rrcem69","country_code":"US","type":"education","lineage":["https://openalex.org/I84218800"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Dean Nguyen Truong","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of California, Davis, CA, USA","Dept. of Electr. & Comput. Eng., Univ. of California, Davis, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of California, Davis, CA, USA","institution_ids":["https://openalex.org/I84218800"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Univ. of California, Davis, CA, USA","institution_ids":["https://openalex.org/I84218800"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5058921665","display_name":"Bevan Baas","orcid":null},"institutions":[{"id":"https://openalex.org/I84218800","display_name":"University of California, Davis","ror":"https://ror.org/05rrcem69","country_code":"US","type":"education","lineage":["https://openalex.org/I84218800"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Bevan Baas","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of California, Davis, CA, USA","Dept. of Electr. & Comput. Eng., Univ. of California, Davis, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of California, Davis, CA, USA","institution_ids":["https://openalex.org/I84218800"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Univ. of California, Davis, CA, USA","institution_ids":["https://openalex.org/I84218800"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I84218800"],"apc_list":null,"apc_paid":null,"fwci":8.1058,"has_fulltext":false,"cited_by_count":35,"citation_normalized_percentile":{"value":0.97321653,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":"29","issue":"6","first_page":"897","last_page":"910"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6773821115493774},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.6022651195526123},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5659264326095581},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5315238237380981},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.4806003272533417},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.47951486706733704},{"id":"https://openalex.org/keywords/mpsoc","display_name":"MPSoC","score":0.4726991653442383},{"id":"https://openalex.org/keywords/baseband","display_name":"Baseband","score":0.47063350677490234},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.4303463101387024},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.3975066542625427},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.38250112533569336},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.2607836127281189},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.19650349020957947},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.12176921963691711},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.0939764678478241},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09388318657875061}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6773821115493774},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.6022651195526123},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5659264326095581},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5315238237380981},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.4806003272533417},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.47951486706733704},{"id":"https://openalex.org/C2777187653","wikidata":"https://www.wikidata.org/wiki/Q975106","display_name":"MPSoC","level":3,"score":0.4726991653442383},{"id":"https://openalex.org/C65165936","wikidata":"https://www.wikidata.org/wiki/Q575784","display_name":"Baseband","level":3,"score":0.47063350677490234},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.4303463101387024},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.3975066542625427},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.38250112533569336},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.2607836127281189},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.19650349020957947},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.12176921963691711},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.0939764678478241},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09388318657875061}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.2010.2048594","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2010.2048594","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.7599999904632568,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":55,"referenced_works":["https://openalex.org/W1492601037","https://openalex.org/W1555915743","https://openalex.org/W1577323490","https://openalex.org/W1633471522","https://openalex.org/W1943426535","https://openalex.org/W2011900848","https://openalex.org/W2017503457","https://openalex.org/W2022038016","https://openalex.org/W2031235329","https://openalex.org/W2035720033","https://openalex.org/W2049962309","https://openalex.org/W2056620549","https://openalex.org/W2069345435","https://openalex.org/W2069940478","https://openalex.org/W2081379617","https://openalex.org/W2095644119","https://openalex.org/W2103497259","https://openalex.org/W2104610013","https://openalex.org/W2105963793","https://openalex.org/W2111172002","https://openalex.org/W2112292992","https://openalex.org/W2112398300","https://openalex.org/W2114522727","https://openalex.org/W2114637081","https://openalex.org/W2115611348","https://openalex.org/W2119081900","https://openalex.org/W2121865749","https://openalex.org/W2123783696","https://openalex.org/W2125788370","https://openalex.org/W2126647846","https://openalex.org/W2133916137","https://openalex.org/W2139075170","https://openalex.org/W2139349254","https://openalex.org/W2140137324","https://openalex.org/W2140267904","https://openalex.org/W2143626656","https://openalex.org/W2147175072","https://openalex.org/W2150872535","https://openalex.org/W2152385473","https://openalex.org/W2157024459","https://openalex.org/W2159005424","https://openalex.org/W2160010046","https://openalex.org/W2166243422","https://openalex.org/W2168082067","https://openalex.org/W2172212694","https://openalex.org/W2176367099","https://openalex.org/W2487142227","https://openalex.org/W2725179571","https://openalex.org/W3103339143","https://openalex.org/W3112867862","https://openalex.org/W3140261852","https://openalex.org/W3209970425","https://openalex.org/W4298011152","https://openalex.org/W6658374045","https://openalex.org/W6674569009"],"related_works":["https://openalex.org/W2055430327","https://openalex.org/W2502691491","https://openalex.org/W1976012348","https://openalex.org/W2002682434","https://openalex.org/W2137671689","https://openalex.org/W4387782849","https://openalex.org/W2113449380","https://openalex.org/W2012131147","https://openalex.org/W2157008728","https://openalex.org/W2092587530"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,30,44,57,108,121,182],"globally-asynchronous":[4],"locally-synchronous":[5],"(GALS)-compatible":[6],"circuit-switched":[7],"on-chip":[8],"network":[9,86,114],"that":[10],"is":[11,41,68,181],"well":[12],"suited":[13],"for":[14,70],"use":[15],"in":[16,185],"many-core":[17],"platforms":[18],"targeting":[19],"streaming":[20],"digital":[21],"signal":[22],"processing":[23],"and":[24,96,134,136,153,164,166],"embedded":[25],"applications":[26],"which":[27,89,180],"typically":[28],"have":[29],"high":[31],"degree":[32],"of":[33,60,74,105,124,140,197],"task-level":[34],"parallelism":[35],"among":[36],"computational":[37],"kernels.":[38],"Inter-processor":[39],"communication":[40],"achieved":[42],"through":[43],"simple":[45],"yet":[46],"effective":[47],"reconfigurable":[48],"source-synchronous":[49],"network.":[50,76],"Interconnect":[51],"paths":[52],"between":[53],"processors":[54,129],"can":[55],"sustain":[56],"peak":[58],"throughput":[59,123],"one":[61],"word":[62],"per":[63],"cycle.":[64],"A":[65,77],"theoretical":[66],"model":[67],"developed":[69],"analyzing":[71],"the":[72,75,103,156,175,192,198],"performance":[73],"65":[78],"nm":[79],"complementary":[80],"metal-oxide\u2013semiconductor":[81],"GALS":[82],"chip":[83,193],"utilizing":[84],"this":[85,106],"was":[87,117],"fabricated":[88],"contains":[90],"164":[91],"programmable":[92],"processors,":[93],"three":[94,97],"accelerators":[95],"shared":[98],"memory":[99],"modules.":[100],"For":[101],"evaluating":[102],"efficiency":[104],"platform,":[107],"complete":[109],"802.11a":[110],"wireless":[111],"local":[112],"area":[113],"baseband":[115],"receiver":[116,176],"implemented.":[118],"It":[119],"has":[120],"real-time":[122],"54":[125],"Mb/s":[126],"with":[127,143],"all":[128],"running":[130],"at":[131,162,171],"594":[132],"MHz":[133],"0.95-V,":[135],"consumes":[137,177],"an":[138],"average":[139],"174.8":[141],"mW":[142,145],"12.2":[144],"(or":[146],"7.0%)":[147],"dissipated":[148],"by":[149],"its":[150],"interconnect":[151],"links":[152],"switches.":[154],"With":[155],"chip's":[157],"dual":[158],"supply":[159],"voltages":[160],"set":[161],"0.95-V":[163],"0.75-V,":[165],"individual":[167],"processors'":[168],"oscillators":[169],"operating":[170],"workload-based":[172],"optimal":[173],"frequencies,":[174],"123.2":[178],"mW,":[179],"29.5%":[183],"reduction":[184],"power.":[186],"Measured":[187],"power":[188],"consumption":[189],"values":[190],"from":[191],"are":[194],"within":[195],"2\u20135%":[196],"estimated":[199],"values.":[200]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":4},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":4},{"year":2013,"cited_by_count":10},{"year":2012,"cited_by_count":4}],"updated_date":"2026-07-29T09:40:50.615796","created_date":"2025-10-10T00:00:00"}