{"id":"https://openalex.org/W2144798343","doi":"https://doi.org/10.1109/tcad.2010.2043873","title":"Modeling Interrupts for Software-Based System-on-Chip Verification","display_name":"Modeling Interrupts for Software-Based System-on-Chip Verification","publication_year":2010,"publication_date":"2010-05-28","ids":{"openalex":"https://openalex.org/W2144798343","doi":"https://doi.org/10.1109/tcad.2010.2043873","mag":"2144798343"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2010.2043873","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2010.2043873","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102180356","display_name":"Xiaoxi Xu","orcid":null},"institutions":[{"id":"https://openalex.org/I5681781","display_name":"The University of Adelaide","ror":"https://ror.org/00892tw58","country_code":"AU","type":"education","lineage":["https://openalex.org/I5681781"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"Xiaoxi Xu","raw_affiliation_strings":["School of Electrical and Electronic Engineering, University of Adelaide, Adelaide, SA, Australia","[Sch. of Electr. & Electron. Eng., Univ. of Adelaide, Adelaide, SA, Australia]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, University of Adelaide, Adelaide, SA, Australia","institution_ids":["https://openalex.org/I5681781"]},{"raw_affiliation_string":"[Sch. of Electr. & Electron. Eng., Univ. of Adelaide, Adelaide, SA, Australia]","institution_ids":["https://openalex.org/I5681781"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5023255651","display_name":"Cheng\u2010Chew Lim","orcid":"https://orcid.org/0000-0002-2463-9760"},"institutions":[{"id":"https://openalex.org/I5681781","display_name":"The University of Adelaide","ror":"https://ror.org/00892tw58","country_code":"AU","type":"education","lineage":["https://openalex.org/I5681781"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"Cheng-Chew Lim","raw_affiliation_strings":["School of Electrical and Electronic Engineering, University of Adelaide, Adelaide, SA, Australia","[Sch. of Electr. & Electron. Eng., Univ. of Adelaide, Adelaide, SA, Australia]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, University of Adelaide, Adelaide, SA, Australia","institution_ids":["https://openalex.org/I5681781"]},{"raw_affiliation_string":"[Sch. of Electr. & Electron. Eng., Univ. of Adelaide, Adelaide, SA, Australia]","institution_ids":["https://openalex.org/I5681781"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I5681781"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.17791294,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"29","issue":"6","first_page":"993","last_page":"997"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/interrupt","display_name":"Interrupt","score":0.9612135887145996},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7268323302268982},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6230588555335999},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.5177944898605347},{"id":"https://openalex.org/keywords/joins","display_name":"Joins","score":0.444810152053833},{"id":"https://openalex.org/keywords/embedded-software","display_name":"Embedded software","score":0.4353809952735901},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.37550005316734314},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.13381627202033997}],"concepts":[{"id":"https://openalex.org/C41661131","wikidata":"https://www.wikidata.org/wiki/Q220764","display_name":"Interrupt","level":3,"score":0.9612135887145996},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7268323302268982},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6230588555335999},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.5177944898605347},{"id":"https://openalex.org/C2778692605","wikidata":"https://www.wikidata.org/wiki/Q4041866","display_name":"Joins","level":2,"score":0.444810152053833},{"id":"https://openalex.org/C154488198","wikidata":"https://www.wikidata.org/wiki/Q1335007","display_name":"Embedded software","level":3,"score":0.4353809952735901},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.37550005316734314},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.13381627202033997},{"id":"https://openalex.org/C173018170","wikidata":"https://www.wikidata.org/wiki/Q165678","display_name":"Microcontroller","level":2,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tcad.2010.2043873","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2010.2043873","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},{"id":"pmh:oai:digital.library.adelaide.edu.au:2440/60040","is_oa":false,"landing_page_url":"http://hdl.handle.net/2440/60040","pdf_url":null,"source":{"id":"https://openalex.org/S4306401835","display_name":"Adelaide Research & Scholarship (AR&S) (University of Adelaide)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I5681781","host_organization_name":"The University of Adelaide","host_organization_lineage":["https://openalex.org/I5681781"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://dx.doi.org/10.1109/tcad.2010.2043873","raw_type":"Journal article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W975510789","https://openalex.org/W1961782657","https://openalex.org/W2098151336","https://openalex.org/W2123246020","https://openalex.org/W2131032473","https://openalex.org/W2144357590","https://openalex.org/W2239146773","https://openalex.org/W4231030659"],"related_works":["https://openalex.org/W2505144121","https://openalex.org/W2359206530","https://openalex.org/W2349471271","https://openalex.org/W315297852","https://openalex.org/W2543878428","https://openalex.org/W2081917376","https://openalex.org/W4237731087","https://openalex.org/W2359065861","https://openalex.org/W2602599056","https://openalex.org/W2382264333"],"abstract_inverted_index":{"The":[0],"interrupt":[1,68],"mechanism":[2,69],"in":[3,43],"a":[4,34],"system-on-chip":[5],"(SoC)":[6],"joins":[7],"the":[8,41,44,67,79,82,94],"SoCs":[9],"hardware":[10,59,95],"and":[11,23,50],"software":[12,29,45,91],"behaviors.":[13],"We":[14],"model":[15],"interrupts":[16],"as":[17,48,55,57],"logical":[18],"rather":[19],"than":[20],"physical":[21],"events":[22],"accordingly":[24],"provides":[25],"guidelines":[26],"to":[27,40],"compose":[28],"components":[30,60],"including":[31],"interrupt-service-routines.":[32],"As":[33],"benefit,":[35],"classical":[36],"indeterministic":[37],"behaviors":[38],"(due":[39],"parallelism)":[42],"domain,":[46],"such":[47],"preemption":[49],"nesting,":[51],"can":[52,87],"be":[53,88],"constructed":[54],"early":[56],"raw":[58],"are":[61],"being":[62],"integrated.":[63],"In":[64],"effect,":[65],"while":[66],"itself":[70],"is":[71,76],"under":[72],"rigorous":[73],"stress,":[74],"it":[75],"simultaneously":[77],"driving":[78],"exercise":[80],"of":[81],"entire":[83],"SoC.":[84],"This":[85],"effect":[86],"observed":[89],"through":[90],"profiling":[92],"at":[93],"integration":[96],"stage.":[97]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}