{"id":"https://openalex.org/W2157602480","doi":"https://doi.org/10.1109/tcad.2010.2043571","title":"Coverage Driven High-Level Test Generation Using a Polynomial Model of Sequential Circuits","display_name":"Coverage Driven High-Level Test Generation Using a Polynomial Model of Sequential Circuits","publication_year":2010,"publication_date":"2010-04-26","ids":{"openalex":"https://openalex.org/W2157602480","doi":"https://doi.org/10.1109/tcad.2010.2043571","mag":"2157602480"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2010.2043571","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2010.2043571","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5069623023","display_name":"Bijan Alizadeh","orcid":"https://orcid.org/0000-0003-4436-4597"},"institutions":[{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Bijan Alizadeh","raw_affiliation_strings":["Very-Large-Scale Integration Design and Education Center, University of Tokyo, Tokyo, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Very-Large-Scale Integration Design and Education Center, University of Tokyo, Tokyo, Japan","institution_ids":["https://openalex.org/I74801974"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065199835","display_name":"Mohammad Mirzaei","orcid":"https://orcid.org/0000-0001-5151-7411"},"institutions":[{"id":"https://openalex.org/I133529467","display_name":"Sharif University of Technology","ror":"https://ror.org/024c2fq17","country_code":"IR","type":"education","lineage":["https://openalex.org/I133529467"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Mohammad Mirzaei","raw_affiliation_strings":["Department of Electrical Engineering, Sharif University of Technology, Tehran, Iran"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Sharif University of Technology, Tehran, Iran","institution_ids":["https://openalex.org/I133529467"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5027837299","display_name":"Masahiro Fujita","orcid":"https://orcid.org/0000-0002-6516-4175"},"institutions":[{"id":"https://openalex.org/I74801974","display_name":"The University of Tokyo","ror":"https://ror.org/057zh3y96","country_code":"JP","type":"education","lineage":["https://openalex.org/I74801974"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Masahiro Fujita","raw_affiliation_strings":["Very-Large-Scale Integration Design and Education Center, University of Tokyo, Tokyo, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Very-Large-Scale Integration Design and Education Center, University of Tokyo, Tokyo, Japan","institution_ids":["https://openalex.org/I74801974"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.7485,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.74814674,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"29","issue":"5","first_page":"737","last_page":"748"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10743","display_name":"Software Testing and Debugging Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1712","display_name":"Software"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.68329918384552},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.6703389883041382},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6300629377365112},{"id":"https://openalex.org/keywords/robustness","display_name":"Robustness (evolution)","score":0.6143766045570374},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.542700469493866},{"id":"https://openalex.org/keywords/polynomial","display_name":"Polynomial","score":0.512370228767395},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.48253175616264343},{"id":"https://openalex.org/keywords/representation","display_name":"Representation (politics)","score":0.47829920053482056},{"id":"https://openalex.org/keywords/boolean-function","display_name":"Boolean function","score":0.47142428159713745},{"id":"https://openalex.org/keywords/test-set","display_name":"Test set","score":0.4554020166397095},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4170646667480469},{"id":"https://openalex.org/keywords/sequential-logic","display_name":"Sequential logic","score":0.4157070517539978},{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.4148479104042053},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.341813325881958},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.26929277181625366},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.26111283898353577},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.1496485471725464},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.08210885524749756}],"concepts":[{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.68329918384552},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.6703389883041382},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6300629377365112},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.6143766045570374},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.542700469493866},{"id":"https://openalex.org/C90119067","wikidata":"https://www.wikidata.org/wiki/Q43260","display_name":"Polynomial","level":2,"score":0.512370228767395},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.48253175616264343},{"id":"https://openalex.org/C2776359362","wikidata":"https://www.wikidata.org/wiki/Q2145286","display_name":"Representation (politics)","level":3,"score":0.47829920053482056},{"id":"https://openalex.org/C187455244","wikidata":"https://www.wikidata.org/wiki/Q942353","display_name":"Boolean function","level":2,"score":0.47142428159713745},{"id":"https://openalex.org/C169903167","wikidata":"https://www.wikidata.org/wiki/Q3985153","display_name":"Test set","level":2,"score":0.4554020166397095},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4170646667480469},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.4157070517539978},{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.4148479104042053},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.341813325881958},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.26929277181625366},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.26111283898353577},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.1496485471725464},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.08210885524749756},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C199539241","wikidata":"https://www.wikidata.org/wiki/Q7748","display_name":"Law","level":1,"score":0.0},{"id":"https://openalex.org/C94625758","wikidata":"https://www.wikidata.org/wiki/Q7163","display_name":"Politics","level":2,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C17744445","wikidata":"https://www.wikidata.org/wiki/Q36442","display_name":"Political science","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.2010.2043571","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2010.2043571","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":39,"referenced_works":["https://openalex.org/W1497002191","https://openalex.org/W1578014232","https://openalex.org/W2004917085","https://openalex.org/W2012039919","https://openalex.org/W2013634896","https://openalex.org/W2060461359","https://openalex.org/W2073306964","https://openalex.org/W2115076468","https://openalex.org/W2115180022","https://openalex.org/W2115443376","https://openalex.org/W2121668251","https://openalex.org/W2124618076","https://openalex.org/W2126042558","https://openalex.org/W2127005882","https://openalex.org/W2127936537","https://openalex.org/W2129126296","https://openalex.org/W2133181803","https://openalex.org/W2134693502","https://openalex.org/W2140546147","https://openalex.org/W2148627094","https://openalex.org/W2152889194","https://openalex.org/W2153077014","https://openalex.org/W2153243080","https://openalex.org/W2154713632","https://openalex.org/W2158966008","https://openalex.org/W2171318521","https://openalex.org/W2171399778","https://openalex.org/W2173393254","https://openalex.org/W2290100076","https://openalex.org/W3144091741","https://openalex.org/W4233176001","https://openalex.org/W4234537939","https://openalex.org/W4236340438","https://openalex.org/W4239570623","https://openalex.org/W4245022609","https://openalex.org/W6629901082","https://openalex.org/W6634570242","https://openalex.org/W6651313382","https://openalex.org/W6683308379"],"related_works":["https://openalex.org/W1493811107","https://openalex.org/W3007887309","https://openalex.org/W2142658549","https://openalex.org/W2142519941","https://openalex.org/W2165817266","https://openalex.org/W2170656965","https://openalex.org/W2135410752","https://openalex.org/W2058953966","https://openalex.org/W2134239377","https://openalex.org/W2135412235"],"abstract_inverted_index":{"This":[0],"paper":[1],"proposes":[2],"a":[3,19,25,48,88,115],"high-level":[4,111],"test":[5,33,99,112,119],"generation":[6,100,113,121],"method":[7,131],"which":[8,85],"considers":[9],"the":[10,41,108],"control":[11],"part":[12],"as":[13,15,24],"well":[14],"data":[16],"path":[17],"of":[18,27,39,60,91,110,129,139],"register":[20],"transfer":[21],"level":[22],"circuit":[23],"set":[26,59],"polynomial":[28,61],"functions":[29,62],"to":[30,71,81,87,133],"generate":[31],"behavioral":[32],"patterns":[34],"from":[35],"faulty":[36,42],"behavior":[37],"instead":[38],"comparing":[40],"and":[43,66,74,97,127,142],"fault-free":[44],"circuits":[45],"based":[46],"on":[47],"hybrid":[49],"Boolean-word":[50],"canonical":[51],"representation":[52],"called":[53],"Horner":[54],"expansion":[55],"diagram.":[56],"Since":[57],"this":[58],"express":[63],"primary":[64,72],"outputs":[65],"next":[67],"states":[68],"with":[69,114],"respect":[70],"inputs":[73],"present":[75],"states,":[76],"it":[77],"is":[78],"not":[79],"necessary":[80],"perform":[82],"justification/propagation":[83],"phase":[84],"leads":[86],"minimum":[89],"number":[90],"backtracks.":[92],"It":[93],"improves":[94],"fault":[95,140],"coverage":[96,141],"reduces":[98],"time":[101],"over":[102],"logic-level":[103],"techniques.":[104],"We":[105],"assess":[106],"then":[107],"effectiveness":[109],"simple":[116],"gate-level":[117],"automatic":[118],"pattern":[120],"algorithm.":[122],"Experimental":[123],"results":[124],"show":[125],"robustness":[126],"reliability":[128],"our":[130],"compared":[132],"other":[134],"contemporary":[135],"approaches":[136],"in":[137],"terms":[138],"CPU":[143],"time.":[144]},"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
