{"id":"https://openalex.org/W2169827315","doi":"https://doi.org/10.1109/tcad.2010.2041845","title":"Pulse Width Allocation and Clock Skew Scheduling: Optimizing Sequential Circuits Based on Pulsed Latches","display_name":"Pulse Width Allocation and Clock Skew Scheduling: Optimizing Sequential Circuits Based on Pulsed Latches","publication_year":2010,"publication_date":"2010-03-01","ids":{"openalex":"https://openalex.org/W2169827315","doi":"https://doi.org/10.1109/tcad.2010.2041845","mag":"2169827315"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2010.2041845","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2010.2041845","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100648766","display_name":"Hyein Lee","orcid":"https://orcid.org/0000-0001-8037-2207"},"institutions":[{"id":"https://openalex.org/I2250650973","display_name":"Samsung (South Korea)","ror":"https://ror.org/04w3jy968","country_code":"KR","type":"company","lineage":["https://openalex.org/I2250650973"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Hyein Lee","raw_affiliation_strings":["Samsung Electronics Company Limited, Yongin si, Gyeonggi, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Samsung Electronics Company Limited, Yongin si, Gyeonggi, South Korea","institution_ids":["https://openalex.org/I2250650973"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108744170","display_name":"Seungwhun Paik","orcid":null},"institutions":[{"id":"https://openalex.org/I157485424","display_name":"Korea Advanced Institute of Science and Technology","ror":"https://ror.org/05apxxy63","country_code":"KR","type":"education","lineage":["https://openalex.org/I157485424"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Seungwhun Paik","raw_affiliation_strings":["Department of Electrical Engineering, Korea Advanced Institute of Science and Technology, Daejeon, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Korea Advanced Institute of Science and Technology, Daejeon, South Korea","institution_ids":["https://openalex.org/I157485424"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5020011072","display_name":"Youngsoo Shin","orcid":"https://orcid.org/0000-0002-7474-9212"},"institutions":[{"id":"https://openalex.org/I157485424","display_name":"Korea Advanced Institute of Science and Technology","ror":"https://ror.org/05apxxy63","country_code":"KR","type":"education","lineage":["https://openalex.org/I157485424"]}],"countries":["KR"],"is_corresponding":false,"raw_author_name":"Youngsoo Shin","raw_affiliation_strings":["Department of Electrical Engineering, Korea Advanced Institute of Science and Technology, Daejeon, South Korea"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Korea Advanced Institute of Science and Technology, Daejeon, South Korea","institution_ids":["https://openalex.org/I157485424"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":5.2965,"has_fulltext":false,"cited_by_count":30,"citation_normalized_percentile":{"value":0.95884924,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"29","issue":"3","first_page":"355","last_page":"366"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/clock-skew","display_name":"Clock skew","score":0.7976517677307129},{"id":"https://openalex.org/keywords/timing-failure","display_name":"Timing failure","score":0.7166250944137573},{"id":"https://openalex.org/keywords/digital-clock-manager","display_name":"Digital clock manager","score":0.6737400889396667},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.5764984488487244},{"id":"https://openalex.org/keywords/skew","display_name":"Skew","score":0.5662761926651001},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5516650080680847},{"id":"https://openalex.org/keywords/clock-domain-crossing","display_name":"Clock domain crossing","score":0.4936996400356293},{"id":"https://openalex.org/keywords/cpu-multiplier","display_name":"CPU multiplier","score":0.4570157825946808},{"id":"https://openalex.org/keywords/clock-gating","display_name":"Clock gating","score":0.4520357847213745},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.44873106479644775},{"id":"https://openalex.org/keywords/pulse","display_name":"Pulse (music)","score":0.4292665123939514},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.3997313380241394},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.38641631603240967},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.34183627367019653},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.26896846294403076},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.25905391573905945},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18621817231178284},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.14159804582595825},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.13861355185508728}],"concepts":[{"id":"https://openalex.org/C60501442","wikidata":"https://www.wikidata.org/wiki/Q4382014","display_name":"Clock skew","level":4,"score":0.7976517677307129},{"id":"https://openalex.org/C104654189","wikidata":"https://www.wikidata.org/wiki/Q7806740","display_name":"Timing failure","level":5,"score":0.7166250944137573},{"id":"https://openalex.org/C113074038","wikidata":"https://www.wikidata.org/wiki/Q5276052","display_name":"Digital clock manager","level":5,"score":0.6737400889396667},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.5764984488487244},{"id":"https://openalex.org/C43711488","wikidata":"https://www.wikidata.org/wiki/Q7534783","display_name":"Skew","level":2,"score":0.5662761926651001},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5516650080680847},{"id":"https://openalex.org/C127204226","wikidata":"https://www.wikidata.org/wiki/Q5134799","display_name":"Clock domain crossing","level":5,"score":0.4936996400356293},{"id":"https://openalex.org/C125576049","wikidata":"https://www.wikidata.org/wiki/Q2246273","display_name":"CPU multiplier","level":5,"score":0.4570157825946808},{"id":"https://openalex.org/C22716491","wikidata":"https://www.wikidata.org/wiki/Q590170","display_name":"Clock gating","level":5,"score":0.4520357847213745},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.44873106479644775},{"id":"https://openalex.org/C2780167933","wikidata":"https://www.wikidata.org/wiki/Q1550652","display_name":"Pulse (music)","level":3,"score":0.4292665123939514},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.3997313380241394},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.38641631603240967},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.34183627367019653},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.26896846294403076},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.25905391573905945},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18621817231178284},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.14159804582595825},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.13861355185508728},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tcad.2010.2041845","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2010.2041845","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},{"id":"pmh:oai:koasas.kaist.ac.kr:10203/99355","is_oa":false,"landing_page_url":"http://hdl.handle.net/10203/99355","pdf_url":null,"source":{"id":"https://openalex.org/S4306402435","display_name":"KAIST Institutional Repository (KAIST)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I157485424","host_organization_name":"Korea Advanced Institute of Science and Technology","host_organization_lineage":["https://openalex.org/I157485424"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":33,"referenced_works":["https://openalex.org/W12081373","https://openalex.org/W29276893","https://openalex.org/W115461275","https://openalex.org/W161930826","https://openalex.org/W1511688816","https://openalex.org/W1590035947","https://openalex.org/W1606989584","https://openalex.org/W1864700546","https://openalex.org/W1995089341","https://openalex.org/W2011778848","https://openalex.org/W2013815172","https://openalex.org/W2076907308","https://openalex.org/W2100332326","https://openalex.org/W2106921373","https://openalex.org/W2113002954","https://openalex.org/W2115468286","https://openalex.org/W2118482092","https://openalex.org/W2119211217","https://openalex.org/W2124438715","https://openalex.org/W2125117969","https://openalex.org/W2133916137","https://openalex.org/W2135347849","https://openalex.org/W2137616964","https://openalex.org/W2155911206","https://openalex.org/W2157398460","https://openalex.org/W2161339729","https://openalex.org/W3197625055","https://openalex.org/W4231706861","https://openalex.org/W4236324780","https://openalex.org/W4246946013","https://openalex.org/W4254389448","https://openalex.org/W6636248855","https://openalex.org/W6682881493"],"related_works":["https://openalex.org/W3006003651","https://openalex.org/W2088914741","https://openalex.org/W4247180033","https://openalex.org/W2040807843","https://openalex.org/W2559451387","https://openalex.org/W4249038728","https://openalex.org/W2133326759","https://openalex.org/W2617666058","https://openalex.org/W2127892766","https://openalex.org/W1564063853"],"abstract_inverted_index":{"Pulsed":[0],"latches,":[1,166],"latches":[2,26],"driven":[3],"by":[4,237],"a":[5,30,35,40,106,118,168,173,186,227],"brief":[6],"clock":[7,45,69,115,143,160,170,174,194,202,208,229,256],"pulse,":[8],"offer":[9],"the":[10,23,75,93,98,149,201,205,232],"same":[11],"convenience":[12],"of":[13,25,77,100,105,110,158,189,196,200,220,222,252],"timing":[14],"verification":[15],"and":[16,83,113,142,165,167,176,231,248,250,254,260],"optimization":[17],"as":[18],"flip-flop-based":[19],"circuits,":[20],"while":[21],"retaining":[22],"advantages":[24],"over":[27],"flip-flops.":[28],"But":[29],"pulsed":[31,126],"latch":[32],"that":[33,79,184],"uses":[34],"single":[36],"pulse":[37,102,163,177,191],"width":[38,140],"has":[39],"lower":[41,58],"bound":[42,121],"on":[43,122],"its":[44,48],"period,":[46,230],"limiting":[47],"capacity":[49],"to":[50,89,147,198],"deal":[51],"with":[52,180,193,262],"higher":[53],"frequencies":[54],"or":[55],"operate":[56],"at":[57],"<i":[59,136,243],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[60,137,244],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">Vdd</i>":[61],".":[62],"The":[63,151,214,239],"limitation":[64],"still":[65],"exists":[66],"even":[67],"when":[68],"skew":[70,78,144],"scheduling":[71,114],"is":[72,85,258],"employed,":[73],"since":[74],"amount":[76],"can":[80],"be":[81],"assigned":[82],"realized":[84,155],"practically":[86],"limited":[87],"due":[88],"process":[90],"variation.":[91],"For":[92],"first":[94],"time,":[95],"we":[96],"formulate":[97],"problem":[99],"allocating":[101],"widths,":[103,112],"out":[104],"small":[107,187],"discrete":[108],"number":[109,188],"predefined":[111,119],"skews,":[116],"within":[117],"upper":[120],"skew,":[123],"for":[124,210],"optimizing":[125],"latch-based":[127],"sequential":[128],"circuits.":[129,213,264],"We":[130],"then":[131],"present":[132],"an":[133,217],"algorithm":[134],"called":[135],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">PWCS_Optimize</i>":[138,245],"(pulse":[139],"allocation":[141],"scheduling,":[145],"PWCS)":[146],"solve":[148],"problem.":[150],"allocated":[152],"skews":[153,195],"are":[154],"through":[156],"synthesis":[157,251],"local":[159,253],"trees":[161,257],"between":[162,172],"generators":[164],"global":[169,255],"tree":[171],"source":[175],"generators.":[178],"Experiments":[179],"65-nm":[181],"technology":[182],"demonstrate":[183],"combining":[185],"different":[190],"widths":[192],"up":[197],"10%":[199],"period":[203,209],"yield":[204],"minimum":[206,228],"achievable":[207],"many":[211],"benchmark":[212],"results":[215],"have":[216],"average":[218,233],"figure":[219],"merit":[221],"0.86,":[223],"where":[224],"1.0":[225],"indicates":[226],"reduction":[234],"in":[235],"area":[236],"11%.":[238],"design":[240],"flow":[241],"including":[242],",":[246],"placement":[247],"routing,":[249],"presented":[259],"assessed":[261],"example":[263]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":3},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":5}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}