{"id":"https://openalex.org/W2171446715","doi":"https://doi.org/10.1109/tcad.2009.2034347","title":"Increasing the Efficiency of Simulation-Based Functional Verification Through Unsupervised Support Vector Analysis","display_name":"Increasing the Efficiency of Simulation-Based Functional Verification Through Unsupervised Support Vector Analysis","publication_year":2009,"publication_date":"2009-12-24","ids":{"openalex":"https://openalex.org/W2171446715","doi":"https://doi.org/10.1109/tcad.2009.2034347","mag":"2171446715"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2009.2034347","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2009.2034347","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5028985572","display_name":"Onur Guzey","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Onur Guzey","raw_affiliation_strings":["Intel Corporation Digital Home Group, Santa Clara, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intel Corporation Digital Home Group, Santa Clara, CA, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100369642","display_name":"Li-C. Wang","orcid":"https://orcid.org/0000-0003-4851-8004"},"institutions":[{"id":"https://openalex.org/I154570441","display_name":"University of California, Santa Barbara","ror":"https://ror.org/02t274463","country_code":"US","type":"education","lineage":["https://openalex.org/I154570441"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Li-C. Wang","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of California,\uc2a0Santa Barbara, Santa Barbara, CA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of California,\uc2a0Santa Barbara, Santa Barbara, CA, USA","institution_ids":["https://openalex.org/I154570441"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075873181","display_name":"Jeremy Levitt","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156212","display_name":"Mentor Technologies","ror":"https://ror.org/05vewsj04","country_code":"US","type":"other","lineage":["https://openalex.org/I4210156212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jeremy R. Levitt","raw_affiliation_strings":["Design Verification and Test Division, Mentor Graphics Corporation, Wilsonville, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Design Verification and Test Division, Mentor Graphics Corporation, Wilsonville, OR, USA","institution_ids":["https://openalex.org/I4210156212"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5055482958","display_name":"Harry Foster","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156212","display_name":"Mentor Technologies","ror":"https://ror.org/05vewsj04","country_code":"US","type":"other","lineage":["https://openalex.org/I4210156212"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Harry Foster","raw_affiliation_strings":["Mentor Graphics Corporation, Wilsonville, OR, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Mentor Graphics Corporation, Wilsonville, OR, USA","institution_ids":["https://openalex.org/I4210156212"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.3842,"has_fulltext":false,"cited_by_count":15,"citation_normalized_percentile":{"value":0.7226199,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"29","issue":"1","first_page":"138","last_page":"148"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10743","display_name":"Software Testing and Debugging Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1712","display_name":"Software"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7406160831451416},{"id":"https://openalex.org/keywords/functional-verification","display_name":"Functional verification","score":0.6546429395675659},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.5815342664718628},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.46049216389656067},{"id":"https://openalex.org/keywords/data-mining","display_name":"Data mining","score":0.44255322217941284},{"id":"https://openalex.org/keywords/machine-learning","display_name":"Machine learning","score":0.4285500645637512},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.3651219308376312},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2108827531337738},{"id":"https://openalex.org/keywords/formal-verification","display_name":"Formal verification","score":0.19378042221069336},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.0853155255317688}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7406160831451416},{"id":"https://openalex.org/C62460635","wikidata":"https://www.wikidata.org/wiki/Q5508853","display_name":"Functional verification","level":3,"score":0.6546429395675659},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.5815342664718628},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.46049216389656067},{"id":"https://openalex.org/C124101348","wikidata":"https://www.wikidata.org/wiki/Q172491","display_name":"Data mining","level":1,"score":0.44255322217941284},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.4285500645637512},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.3651219308376312},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2108827531337738},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.19378042221069336},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0853155255317688},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.2009.2034347","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2009.2034347","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":28,"referenced_works":["https://openalex.org/W1516339813","https://openalex.org/W1594996713","https://openalex.org/W1634497122","https://openalex.org/W2011645538","https://openalex.org/W2016126615","https://openalex.org/W2026584294","https://openalex.org/W2035445270","https://openalex.org/W2096449544","https://openalex.org/W2098165956","https://openalex.org/W2102853656","https://openalex.org/W2103793078","https://openalex.org/W2107519162","https://openalex.org/W2118485338","https://openalex.org/W2143387652","https://openalex.org/W2153635508","https://openalex.org/W2162120832","https://openalex.org/W2165410907","https://openalex.org/W2478728447","https://openalex.org/W2581192553","https://openalex.org/W3150909239","https://openalex.org/W3151457670","https://openalex.org/W3152300815","https://openalex.org/W4230674625","https://openalex.org/W4234474371","https://openalex.org/W4247643887","https://openalex.org/W4250319054","https://openalex.org/W6654600361","https://openalex.org/W6675885515"],"related_works":["https://openalex.org/W2373681493","https://openalex.org/W2012262513","https://openalex.org/W2961085424","https://openalex.org/W2118572231","https://openalex.org/W2354470518","https://openalex.org/W2158119830","https://openalex.org/W3155012083","https://openalex.org/W4250430720","https://openalex.org/W2929969821","https://openalex.org/W4224009465"],"abstract_inverted_index":{"Success":[0],"of":[1,11,20,34,52,142,157],"simulation-based":[2],"functional":[3],"verification":[4,13,54,135],"depends":[5],"on":[6,140],"the":[7,12,35,53,134,143,147,155],"quality":[8],"and":[9,106],"diversity":[10],"tests":[14,27,55,76,105],"that":[15,28,48,77,83],"are":[16,78,151],"simulated.":[17],"The":[18],"objective":[19],"test":[21,59,118,123],"generation":[22,119,124],"methods":[23],"is":[24,69],"to":[25,70,74,80,102,125,133,146,153],"generate":[26],"exercise":[29,81],"as":[30,38],"much":[31],"different":[32],"functionality":[33,82],"hardware":[36],"designs":[37],"possible.":[39],"In":[40],"this":[41,72,91],"paper,":[42],"we":[43],"propose":[44],"a":[45,50,57,117],"novel":[46],"methodology":[47,112,145],"generates":[49],"model":[51,73],"in":[56],"given":[58],"set":[60],"using":[61],"unsupervised":[62],"support":[63],"vector":[64],"analysis.":[65],"One":[66],"potential":[67],"application":[68,141],"use":[71],"select":[75],"likely":[79],"has":[84],"not":[85],"been":[86],"tested":[87],"so":[88],"far.":[89],"Since":[90],"selection":[92],"can":[93,99,113],"be":[94,100,114],"done":[95],"before":[96],"simulation,":[97],"it":[98],"used":[101],"filter":[103],"redundant":[104],"reduce":[107],"required":[108],"simulation":[109],"cycles.":[110],"Our":[111],"combined":[115],"with":[116],"method":[120],"like":[121],"constrained-random":[122],"increase":[126],"its":[127],"effectiveness":[128],"without":[129],"making":[130],"fundamental":[131],"changes":[132],"flow.":[136],"Experimental":[137],"results":[138],"based":[139],"proposed":[144],"OpenSparc":[148],"T1":[149],"processor":[150],"reported":[152],"demonstrate":[154],"practicality":[156],"our":[158],"approach.":[159]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":4},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-29T09:40:50.615796","created_date":"2025-10-10T00:00:00"}