{"id":"https://openalex.org/W2089427056","doi":"https://doi.org/10.1109/tcad.2009.2023197","title":"Probabilistic Analysis and Design of Metallic-Carbon-Nanotube-Tolerant Digital Logic Circuits","display_name":"Probabilistic Analysis and Design of Metallic-Carbon-Nanotube-Tolerant Digital Logic Circuits","publication_year":2009,"publication_date":"2009-08-24","ids":{"openalex":"https://openalex.org/W2089427056","doi":"https://doi.org/10.1109/tcad.2009.2023197","mag":"2089427056"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2009.2023197","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2009.2023197","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101584948","display_name":"Jie Zhang","orcid":"https://orcid.org/0000-0002-2999-0760"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Jie Zhang","raw_affiliation_strings":["Department of Electrical Engineering, University of Stanford, Stanford, CA, USA","[Dept. of Electr. Eng., Stanford Univ., Stanford, CA, USA]"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Stanford, Stanford, CA, USA","institution_ids":["https://openalex.org/I97018004"]},{"raw_affiliation_string":"[Dept. of Electr. Eng., Stanford Univ., Stanford, CA, USA]","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5037285672","display_name":"Nishant Patil","orcid":"https://orcid.org/0000-0001-6620-0038"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"N.P. Patil","raw_affiliation_strings":["Department of Electrical Engineering, University of Stanford, Stanford, CA, USA","[Dept. of Electr. Eng., Stanford Univ., Stanford, CA, USA]"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Stanford, Stanford, CA, USA","institution_ids":["https://openalex.org/I97018004"]},{"raw_affiliation_string":"[Dept. of Electr. Eng., Stanford Univ., Stanford, CA, USA]","institution_ids":["https://openalex.org/I97018004"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5036312663","display_name":"Subhasish Mitra","orcid":"https://orcid.org/0000-0002-5572-5194"},"institutions":[{"id":"https://openalex.org/I97018004","display_name":"Stanford University","ror":"https://ror.org/00f54p054","country_code":"US","type":"education","lineage":["https://openalex.org/I97018004"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Mitra","raw_affiliation_strings":["[Dept. of Electr. Eng., Stanford Univ., Stanford, CA, USA]"],"affiliations":[{"raw_affiliation_string":"[Dept. of Electr. Eng., Stanford Univ., Stanford, CA, USA]","institution_ids":["https://openalex.org/I97018004"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5101584948"],"corresponding_institution_ids":["https://openalex.org/I97018004"],"apc_list":null,"apc_paid":null,"fwci":7.4769,"has_fulltext":false,"cited_by_count":60,"citation_normalized_percentile":{"value":0.97573138,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":93,"max":99},"biblio":{"volume":"28","issue":"9","first_page":"1307","last_page":"1320"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10074","display_name":"Carbon Nanotubes in Composites","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2505","display_name":"Materials Chemistry"},"field":{"id":"https://openalex.org/fields/25","display_name":"Materials Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.6500310897827148},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.6438961029052734},{"id":"https://openalex.org/keywords/carbon-nanotube","display_name":"Carbon nanotube","score":0.6091059446334839},{"id":"https://openalex.org/keywords/probabilistic-logic","display_name":"Probabilistic logic","score":0.5270721316337585},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5134697556495667},{"id":"https://openalex.org/keywords/noise-margin","display_name":"Noise margin","score":0.5120875835418701},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.5041462182998657},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4623277187347412},{"id":"https://openalex.org/keywords/field-effect-transistor","display_name":"Field-effect transistor","score":0.45856937766075134},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.43609219789505005},{"id":"https://openalex.org/keywords/leakage","display_name":"Leakage (economics)","score":0.4316256046295166},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.4251054525375366},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.41964632272720337},{"id":"https://openalex.org/keywords/nanotechnology","display_name":"Nanotechnology","score":0.4190405011177063},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4133548140525818},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.40154868364334106},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3336598873138428},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2119760811328888},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.11849749088287354}],"concepts":[{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.6500310897827148},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.6438961029052734},{"id":"https://openalex.org/C513720949","wikidata":"https://www.wikidata.org/wiki/Q1778729","display_name":"Carbon nanotube","level":2,"score":0.6091059446334839},{"id":"https://openalex.org/C49937458","wikidata":"https://www.wikidata.org/wiki/Q2599292","display_name":"Probabilistic logic","level":2,"score":0.5270721316337585},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5134697556495667},{"id":"https://openalex.org/C179499742","wikidata":"https://www.wikidata.org/wiki/Q1324892","display_name":"Noise margin","level":4,"score":0.5120875835418701},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.5041462182998657},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4623277187347412},{"id":"https://openalex.org/C145598152","wikidata":"https://www.wikidata.org/wiki/Q176097","display_name":"Field-effect transistor","level":4,"score":0.45856937766075134},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.43609219789505005},{"id":"https://openalex.org/C2777042071","wikidata":"https://www.wikidata.org/wiki/Q6509304","display_name":"Leakage (economics)","level":2,"score":0.4316256046295166},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.4251054525375366},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.41964632272720337},{"id":"https://openalex.org/C171250308","wikidata":"https://www.wikidata.org/wiki/Q11468","display_name":"Nanotechnology","level":1,"score":0.4190405011177063},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4133548140525818},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.40154868364334106},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3336598873138428},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2119760811328888},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.11849749088287354},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.2009.2023197","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2009.2023197","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":61,"referenced_works":["https://openalex.org/W973491057","https://openalex.org/W1534416617","https://openalex.org/W1534925464","https://openalex.org/W1560640234","https://openalex.org/W1603422789","https://openalex.org/W1629358907","https://openalex.org/W1661368752","https://openalex.org/W1964189680","https://openalex.org/W1964962102","https://openalex.org/W1968487830","https://openalex.org/W1973626887","https://openalex.org/W1981374083","https://openalex.org/W1983959328","https://openalex.org/W1984584567","https://openalex.org/W1991561423","https://openalex.org/W2002453109","https://openalex.org/W2003737824","https://openalex.org/W2004778772","https://openalex.org/W2014091871","https://openalex.org/W2019296501","https://openalex.org/W2021580749","https://openalex.org/W2022451925","https://openalex.org/W2022835305","https://openalex.org/W2032324308","https://openalex.org/W2037921569","https://openalex.org/W2039953952","https://openalex.org/W2057952798","https://openalex.org/W2065769607","https://openalex.org/W2075966063","https://openalex.org/W2091844454","https://openalex.org/W2094834535","https://openalex.org/W2095369073","https://openalex.org/W2098194061","https://openalex.org/W2100890870","https://openalex.org/W2103491903","https://openalex.org/W2103727077","https://openalex.org/W2112448497","https://openalex.org/W2118973076","https://openalex.org/W2120000030","https://openalex.org/W2140437015","https://openalex.org/W2146669227","https://openalex.org/W2152272528","https://openalex.org/W2154054117","https://openalex.org/W2158118249","https://openalex.org/W2159568563","https://openalex.org/W2168101540","https://openalex.org/W2168442336","https://openalex.org/W2170386107","https://openalex.org/W2171187927","https://openalex.org/W2172161464","https://openalex.org/W2296084214","https://openalex.org/W2539132847","https://openalex.org/W2801179766","https://openalex.org/W3103846853","https://openalex.org/W4210341450","https://openalex.org/W4232182869","https://openalex.org/W4233559368","https://openalex.org/W4239889878","https://openalex.org/W4251240676","https://openalex.org/W4300223101","https://openalex.org/W6636268624"],"related_works":["https://openalex.org/W4283025278","https://openalex.org/W2082432309","https://openalex.org/W817174743","https://openalex.org/W2050492524","https://openalex.org/W2998315020","https://openalex.org/W2912670917","https://openalex.org/W2010270881","https://openalex.org/W2766377030","https://openalex.org/W2793069264","https://openalex.org/W744790032"],"abstract_inverted_index":{"<para":[0],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[1],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">":[2],"Metallic":[3,23],"carbon":[4],"nanotubes":[5],"(CNTs)":[6],"pose":[7],"a":[8,69],"major":[9],"barrier":[10],"to":[11,27],"the":[12,83,109],"design":[13,76,112],"of":[14,82,85,95],"digital":[15,97,126],"logic":[16,98],"circuits":[17],"using":[18],"CNT":[19,46,64],"field-effect":[20],"transistors":[21],"(CNFETs).":[22],"CNTs":[24,62,87],"create":[25],"source":[26],"drain":[28],"shorts":[29],"in":[30,33],"CNFETs,":[31],"resulting":[32],"undesirable":[34],"effects":[35],"such":[36],"as":[37],"excessive":[38],"leakage":[39],"and":[40,75,78,92,113],"degraded":[41],"noise":[42,90],"margins.":[43],"No":[44],"known":[45],"growth":[47],"technique":[48],"guarantees":[49],"0%":[50],"metallic":[51,61,86],"CNTs.":[52],"Therefore,":[53],"special":[54],"processing":[55,74,114],"techniques":[56],"are":[57,117],"required":[58,118],"for":[59,119],"removing":[60],"after":[63],"growth.":[65],"This":[66],"paper":[67],"presents":[68],"probabilistic":[70],"model":[71,110],"which":[72],"incorporates":[73],"parameters":[77],"enables":[79],"quantitative":[80],"analysis":[81],"impact":[84],"on":[88,103],"leakage,":[89],"margin,":[91],"delay":[93],"variations":[94],"CNFET-based":[96],"circuits.":[99,127],"With":[100],"practical":[101],"constraints":[102],"these":[104],"key":[105],"circuit":[106],"performance":[107],"metrics,":[108],"provides":[111],"guidelines":[115],"that":[116],"very":[120],"large":[121],"scale":[122],"integration":[123],"(VLSI)-scale":[124],"metallic-CNT-tolerant":[125],"</para>":[128]},"counts_by_year":[{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":5},{"year":2014,"cited_by_count":5},{"year":2013,"cited_by_count":6},{"year":2012,"cited_by_count":4}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
