{"id":"https://openalex.org/W2109824007","doi":"https://doi.org/10.1109/tcad.2009.2016136","title":"Evaluation of Analog/RF Test Measurements at the Design Stage","display_name":"Evaluation of Analog/RF Test Measurements at the Design Stage","publication_year":2009,"publication_date":"2009-03-19","ids":{"openalex":"https://openalex.org/W2109824007","doi":"https://doi.org/10.1109/tcad.2009.2016136","mag":"2109824007"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2009.2016136","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2009.2016136","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5091734149","display_name":"Haralampos\u2010G. Stratigopoulos","orcid":"https://orcid.org/0000-0002-9943-5607"},"institutions":[{"id":"https://openalex.org/I106785703","display_name":"Institut polytechnique de Grenoble","ror":"https://ror.org/05sbt2524","country_code":"FR","type":"education","lineage":["https://openalex.org/I106785703","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I177483745","display_name":"Universit\u00e9 Joseph Fourier","ror":"https://ror.org/02aj0kh94","country_code":"FR","type":"education","lineage":["https://openalex.org/I177483745"]},{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"H.-G. Stratigopoulos","raw_affiliation_strings":["TIMA Laboratory, CNRS-Grenoble Institute of Technology-Universite Joseph Fourier, Grenoble, France","CNRS-Grenoble Inst. of Technol., Univ. Joseph Fourier, Grenoble"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TIMA Laboratory, CNRS-Grenoble Institute of Technology-Universite Joseph Fourier, Grenoble, France","institution_ids":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I177483745","https://openalex.org/I4210087012"]},{"raw_affiliation_string":"CNRS-Grenoble Inst. of Technol., Univ. Joseph Fourier, Grenoble","institution_ids":["https://openalex.org/I106785703","https://openalex.org/I1294671590"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109283444","display_name":"S. Mir","orcid":null},"institutions":[{"id":"https://openalex.org/I106785703","display_name":"Institut polytechnique de Grenoble","ror":"https://ror.org/05sbt2524","country_code":"FR","type":"education","lineage":["https://openalex.org/I106785703","https://openalex.org/I899635006"]},{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I177483745","display_name":"Universit\u00e9 Joseph Fourier","ror":"https://ror.org/02aj0kh94","country_code":"FR","type":"education","lineage":["https://openalex.org/I177483745"]},{"id":"https://openalex.org/I4210087012","display_name":"Techniques of Informatics and Microelectronics for Integrated Systems Architecture","ror":"https://ror.org/000063q30","country_code":"FR","type":"facility","lineage":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I4210087012","https://openalex.org/I4210159245","https://openalex.org/I899635006","https://openalex.org/I899635006"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"S. Mir","raw_affiliation_strings":["TIMA Laboratory, CNRS-Grenoble Institute of Technology-Universite Joseph Fourier, Grenoble, France","CNRS-Grenoble Inst. of Technol., Univ. Joseph Fourier, Grenoble"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TIMA Laboratory, CNRS-Grenoble Institute of Technology-Universite Joseph Fourier, Grenoble, France","institution_ids":["https://openalex.org/I106785703","https://openalex.org/I1294671590","https://openalex.org/I177483745","https://openalex.org/I4210087012"]},{"raw_affiliation_string":"CNRS-Grenoble Inst. of Technol., Univ. Joseph Fourier, Grenoble","institution_ids":["https://openalex.org/I106785703","https://openalex.org/I1294671590"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5079720434","display_name":"Ahc\u00e8ne Bounceur","orcid":"https://orcid.org/0000-0002-0043-7742"},"institutions":[{"id":"https://openalex.org/I126425946","display_name":"Universit\u00e9 Europ\u00e9enne de Bretagne","ror":"https://ror.org/033c46s90","country_code":"FR","type":"education","lineage":["https://openalex.org/I126425946"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"A. Bounceur","raw_affiliation_strings":["Universit\u00e9 Europ\u00e9enne de Bretagne, Brest, France","Univ. Europeenne de Bretagne, Brest"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Universit\u00e9 Europ\u00e9enne de Bretagne, Brest, France","institution_ids":["https://openalex.org/I126425946"]},{"raw_affiliation_string":"Univ. Europeenne de Bretagne, Brest","institution_ids":["https://openalex.org/I126425946"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":10.893,"has_fulltext":false,"cited_by_count":57,"citation_normalized_percentile":{"value":0.98334249,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"28","issue":"4","first_page":"582","last_page":"590"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/parametric-statistics","display_name":"Parametric statistics","score":0.6615582704544067},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6411601901054382},{"id":"https://openalex.org/keywords/nonparametric-statistics","display_name":"Nonparametric statistics","score":0.5803917646408081},{"id":"https://openalex.org/keywords/monte-carlo-method","display_name":"Monte Carlo method","score":0.5793157815933228},{"id":"https://openalex.org/keywords/test-data","display_name":"Test data","score":0.5079002976417542},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.488660603761673},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.47313132882118225},{"id":"https://openalex.org/keywords/statistical-hypothesis-testing","display_name":"Statistical hypothesis testing","score":0.4714157283306122},{"id":"https://openalex.org/keywords/test-method","display_name":"Test method","score":0.4665985107421875},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4547727108001709},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.4491288363933563},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.4401818513870239},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.33602672815322876},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.3175661861896515},{"id":"https://openalex.org/keywords/statistics","display_name":"Statistics","score":0.21117523312568665},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.19249370694160461},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17924049496650696},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.1377885639667511}],"concepts":[{"id":"https://openalex.org/C117251300","wikidata":"https://www.wikidata.org/wiki/Q1849855","display_name":"Parametric statistics","level":2,"score":0.6615582704544067},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6411601901054382},{"id":"https://openalex.org/C102366305","wikidata":"https://www.wikidata.org/wiki/Q1097688","display_name":"Nonparametric statistics","level":2,"score":0.5803917646408081},{"id":"https://openalex.org/C19499675","wikidata":"https://www.wikidata.org/wiki/Q232207","display_name":"Monte Carlo method","level":2,"score":0.5793157815933228},{"id":"https://openalex.org/C16910744","wikidata":"https://www.wikidata.org/wiki/Q7705759","display_name":"Test data","level":2,"score":0.5079002976417542},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.488660603761673},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.47313132882118225},{"id":"https://openalex.org/C87007009","wikidata":"https://www.wikidata.org/wiki/Q210832","display_name":"Statistical hypothesis testing","level":2,"score":0.4714157283306122},{"id":"https://openalex.org/C132519959","wikidata":"https://www.wikidata.org/wiki/Q3077373","display_name":"Test method","level":2,"score":0.4665985107421875},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4547727108001709},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.4491288363933563},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.4401818513870239},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.33602672815322876},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.3175661861896515},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.21117523312568665},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.19249370694160461},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17924049496650696},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.1377885639667511},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tcad.2009.2016136","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2009.2016136","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},{"id":"pmh:oai:HAL:hal-00379139v1","is_oa":false,"landing_page_url":"https://hal.science/hal-00379139","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2009, 28 (4), pp.582-590. ⟨10.1109/TCAD.2009.2016136⟩","raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":42,"referenced_works":["https://openalex.org/W112110376","https://openalex.org/W121853704","https://openalex.org/W1495288325","https://openalex.org/W1686846969","https://openalex.org/W1979620348","https://openalex.org/W1983366148","https://openalex.org/W1993214446","https://openalex.org/W2027025585","https://openalex.org/W2030066972","https://openalex.org/W2034650804","https://openalex.org/W2105583569","https://openalex.org/W2109172132","https://openalex.org/W2114265927","https://openalex.org/W2114435646","https://openalex.org/W2114482684","https://openalex.org/W2116122398","https://openalex.org/W2122000269","https://openalex.org/W2129905273","https://openalex.org/W2130028907","https://openalex.org/W2133564277","https://openalex.org/W2138908842","https://openalex.org/W2141004763","https://openalex.org/W2141118186","https://openalex.org/W2142049768","https://openalex.org/W2142770304","https://openalex.org/W2144362552","https://openalex.org/W2145403171","https://openalex.org/W2146779214","https://openalex.org/W2149494728","https://openalex.org/W2154183610","https://openalex.org/W2155933994","https://openalex.org/W2156213538","https://openalex.org/W2161195949","https://openalex.org/W2161359911","https://openalex.org/W2172258792","https://openalex.org/W2491057826","https://openalex.org/W3149114438","https://openalex.org/W4233014035","https://openalex.org/W4251786651","https://openalex.org/W4252378425","https://openalex.org/W4253455740","https://openalex.org/W4254440256"],"related_works":["https://openalex.org/W1997747147","https://openalex.org/W4296826658","https://openalex.org/W4251996830","https://openalex.org/W2924932104","https://openalex.org/W2135894974","https://openalex.org/W2985158452","https://openalex.org/W4297915994","https://openalex.org/W2131297085","https://openalex.org/W2769360515","https://openalex.org/W1895064253"],"abstract_inverted_index":{"We":[0],"present":[1],"a":[2,60,90,129,155],"method":[3,21,86,125],"that":[4,48,68,141],"is":[5,87,126],"capable":[6],"of":[7,55,78,84,93,121,151],"handling":[8],"process":[9],"variations":[10],"to":[11,26,44,63,88,115],"evaluate":[12],"analog/RF":[13],"test":[14,28,33,46,53,66,97,100],"measurements":[15,101],"at":[16],"the":[17,75,85,94,99,107,142,147],"design":[18],"stage.":[19],"The":[20,81,124,138],"can":[22,110],"readily":[23],"be":[24,111],"used":[25],"estimate":[27],"metrics,":[29],"such":[30],"as":[31],"parametric":[32],"escape":[34],"and":[35,43,98],"yield":[36],"loss,":[37],"with":[38],"parts":[39],"per":[40],"million":[41],"accuracy,":[42],"fix":[45],"limits":[47],"satisfy":[49],"specific":[50],"tradeoffs":[51],"between":[52],"metrics":[54],"interest.":[56],"Furthermore,":[57],"it":[58],"provides":[59],"general":[61],"framework":[62],"compare":[64],"alternative":[65],"solutions":[67],"are":[69],"continuously":[70],"being":[71],"proposed":[72,131],"toward":[73],"reducing":[74],"high":[76],"cost":[77],"specification-based":[79],"tests.":[80],"key":[82],"idea":[83],"build":[89],"statistical":[91,108],"model":[92,109],"circuit":[95,161],"under":[96],"using":[102],"nonparametric":[103],"density":[104],"estimation.":[105],"Thereafter,":[106],"simulated":[112],"very":[113],"fast":[114],"generate":[116],"an":[117],"arbitrarily":[118],"large":[119],"volume":[120],"new":[122,143],"data.":[123],"demonstrated":[127],"for":[128,135],"previously":[130],"built-in":[132],"self-test":[133],"measurement":[134],"low-noise":[136],"amplifiers.":[137],"result":[139],"indicates":[140],"synthetic":[144],"data":[145,152],"have":[146],"exact":[148],"same":[149],"structure":[150],"generated":[153],"by":[154],"computationally":[156],"intensive":[157],"brute-force":[158],"Monte":[159],"Carlo":[160],"simulation.":[162]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":3},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":3},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":4},{"year":2013,"cited_by_count":6},{"year":2012,"cited_by_count":7}],"updated_date":"2026-07-22T07:51:19.307946","created_date":"2025-10-10T00:00:00"}