{"id":"https://openalex.org/W2154421641","doi":"https://doi.org/10.1109/tcad.2009.2015736","title":"Bit-Swapping LFSR and Scan-Chain Ordering: A Novel Technique for Peak- and Average-Power Reduction in Scan-Based BIST","display_name":"Bit-Swapping LFSR and Scan-Chain Ordering: A Novel Technique for Peak- and Average-Power Reduction in Scan-Based BIST","publication_year":2009,"publication_date":"2009-04-22","ids":{"openalex":"https://openalex.org/W2154421641","doi":"https://doi.org/10.1109/tcad.2009.2015736","mag":"2154421641"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2009.2015736","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2009.2015736","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5063445290","display_name":"Abdallatif Abu-Issa","orcid":"https://orcid.org/0000-0002-7030-4734"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"A.S. Abu-Issa","raw_affiliation_strings":["School of Electronic, Electrical and Computer Engineering, University of Binningham, Birmingham, UK"],"affiliations":[{"raw_affiliation_string":"School of Electronic, Electrical and Computer Engineering, University of Binningham, Birmingham, UK","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5109213028","display_name":"S.F. Quigley","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"S.F. Quigley","raw_affiliation_strings":["School of Electronic, Electrical and Computer Engineering, University of Binningham, Birmingham, UK"],"affiliations":[{"raw_affiliation_string":"School of Electronic, Electrical and Computer Engineering, University of Binningham, Birmingham, UK","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5063445290"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":1.5829,"has_fulltext":false,"cited_by_count":64,"citation_normalized_percentile":{"value":0.84864332,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":100},"biblio":{"volume":"28","issue":"5","first_page":"755","last_page":"759"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9948999881744385,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/scan-chain","display_name":"Scan chain","score":0.9311023950576782},{"id":"https://openalex.org/keywords/linear-feedback-shift-register","display_name":"Linear feedback shift register","score":0.829793393611908},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.6924868226051331},{"id":"https://openalex.org/keywords/shift-register","display_name":"Shift register","score":0.6707205176353455},{"id":"https://openalex.org/keywords/multiplexer","display_name":"Multiplexer","score":0.659273624420166},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.5602641701698303},{"id":"https://openalex.org/keywords/test-compression","display_name":"Test compression","score":0.5020241737365723},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.49828433990478516},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.49764183163642883},{"id":"https://openalex.org/keywords/built-in-self-test","display_name":"Built-in self-test","score":0.45747920870780945},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.42908918857574463},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4259144067764282},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.38039544224739075},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.332408607006073},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3256332278251648},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.3037106394767761},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.18255510926246643},{"id":"https://openalex.org/keywords/multiplexing","display_name":"Multiplexing","score":0.18185853958129883},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17677009105682373},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.10556197166442871},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.08454397320747375}],"concepts":[{"id":"https://openalex.org/C150012182","wikidata":"https://www.wikidata.org/wiki/Q225990","display_name":"Scan chain","level":3,"score":0.9311023950576782},{"id":"https://openalex.org/C159862308","wikidata":"https://www.wikidata.org/wiki/Q681101","display_name":"Linear feedback shift register","level":4,"score":0.829793393611908},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.6924868226051331},{"id":"https://openalex.org/C49654631","wikidata":"https://www.wikidata.org/wiki/Q746165","display_name":"Shift register","level":3,"score":0.6707205176353455},{"id":"https://openalex.org/C70970002","wikidata":"https://www.wikidata.org/wiki/Q189434","display_name":"Multiplexer","level":3,"score":0.659273624420166},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.5602641701698303},{"id":"https://openalex.org/C29652920","wikidata":"https://www.wikidata.org/wiki/Q7705757","display_name":"Test compression","level":4,"score":0.5020241737365723},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.49828433990478516},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.49764183163642883},{"id":"https://openalex.org/C2780980493","wikidata":"https://www.wikidata.org/wiki/Q181142","display_name":"Built-in self-test","level":2,"score":0.45747920870780945},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.42908918857574463},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4259144067764282},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.38039544224739075},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.332408607006073},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3256332278251648},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.3037106394767761},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.18255510926246643},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.18185853958129883},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17677009105682373},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.10556197166442871},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.08454397320747375},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tcad.2009.2015736","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2009.2015736","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},{"id":"pmh:oai:pure.atira.dk:openaire_cris_publications/7b110ca8-a74a-4d69-9ee7-8867686a0cf5","is_oa":false,"landing_page_url":"https://research.birmingham.ac.uk/en/publications/7b110ca8-a74a-4d69-9ee7-8867686a0cf5","pdf_url":null,"source":{"id":"https://openalex.org/S4306402634","display_name":"University of Birmingham Research Portal (University of Birmingham)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I79619799","host_organization_name":"University of Birmingham","host_organization_lineage":["https://openalex.org/I79619799"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Abu-Issa, AS & Quigley, S 2009, 'Bit-Swapping LFSR and Scan-Chain Ordering: A Novel Technique for Peak- and Average-Power Reduction in Scan-Based BIST', IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 28, no. 5, pp. 755-759. https://doi.org/10.1109/TCAD.2009.2015736","raw_type":"article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8299999833106995,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":33,"referenced_works":["https://openalex.org/W67130178","https://openalex.org/W260727648","https://openalex.org/W1485328666","https://openalex.org/W1511698946","https://openalex.org/W1515082873","https://openalex.org/W1557977552","https://openalex.org/W1820769975","https://openalex.org/W1900996732","https://openalex.org/W1994851507","https://openalex.org/W2000179366","https://openalex.org/W2040241863","https://openalex.org/W2073174913","https://openalex.org/W2074480570","https://openalex.org/W2099891356","https://openalex.org/W2103810183","https://openalex.org/W2105913179","https://openalex.org/W2106303764","https://openalex.org/W2108471909","https://openalex.org/W2110232289","https://openalex.org/W2116592115","https://openalex.org/W2119691242","https://openalex.org/W2122643352","https://openalex.org/W2125054260","https://openalex.org/W2131943868","https://openalex.org/W2132881562","https://openalex.org/W2138654786","https://openalex.org/W2139234345","https://openalex.org/W2160621850","https://openalex.org/W2160843080","https://openalex.org/W2168247232","https://openalex.org/W2533825491","https://openalex.org/W3099826813","https://openalex.org/W4231670536"],"related_works":["https://openalex.org/W2107463329","https://openalex.org/W1988614986","https://openalex.org/W2364150359","https://openalex.org/W1593657804","https://openalex.org/W2340052325","https://openalex.org/W2099891356","https://openalex.org/W2105101572","https://openalex.org/W2333796949","https://openalex.org/W2386366670","https://openalex.org/W1182583055"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,23,39,79,102,110,130,133,139],"novel":[4],"low-transition":[5],"linear":[6],"feedback":[7],"shift":[8,68],"register":[9],"(LFSR)":[10],"that":[11,60,105,112],"is":[12,33,99],"based":[13],"on":[14,142,150,159],"some":[15],"new":[16],"observations":[17],"about":[18],"the":[19,56,63,85,90,107,114,123],"output":[20],"sequence":[21],"of":[22,35,58],"conventional":[24,80],"LFSR.":[25,81],"The":[26,97],"proposed":[27],"design,":[28],"called":[29],"bit-swapping":[30],"LFSR":[31,37],"(BS-LFSR),":[32],"composed":[34],"an":[36],"and":[38,116,120,144,167,172],"2":[40],"times":[41],"1":[42],"multiplexer.":[43],"When":[44],"used":[45],"to":[46,74,132,165],"generate":[47],"test":[48,93,95,124,154],"patterns":[49,76],"for":[50],"scan-based":[51],"built-in":[52],"self-tests,":[53],"it":[54,83],"reduces":[55,84,113],"number":[57],"transitions":[59],"occur":[61],"at":[62],"scan-chain":[64],"input":[65],"during":[66,94],"scan":[67],"operation":[69],"by":[70,78],"50%":[71],"when":[72],"compared":[73],"those":[75],"produced":[77],"Hence,":[82],"overall":[86],"switching":[87],"activity":[88],"in":[89,109,122,170],"circuit":[91],"under":[92],"applications.":[96],"BS-LFSR":[98],"combined":[100],"with":[101,147],"scan-chain-ordering":[103],"algorithm":[104],"orders":[106],"cells":[108],"way":[111],"average":[115,171],"peak":[117,173],"power":[118],"(scan":[119],"capture)":[121],"cycle":[125],"or":[126,153],"while":[127],"scanning":[128],"out":[129],"response":[131],"signature":[134],"analyzer.":[135],"These":[136],"techniques":[137],"have":[138],"substantial":[140],"effect":[141,149],"average-":[143],"peak-power":[145],"reductions":[146,169],"negligible":[148],"fault":[151],"coverage":[152],"application":[155],"time.":[156],"Experimental":[157],"results":[158],"ISCAS'89":[160],"benchmark":[161],"circuits":[162],"show":[163],"up":[164],"65%":[166],"55%":[168],"power,":[174],"respectively.":[175]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":5},{"year":2022,"cited_by_count":7},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":5},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":6},{"year":2015,"cited_by_count":4},{"year":2014,"cited_by_count":17},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}