{"id":"https://openalex.org/W4235014700","doi":"https://doi.org/10.1109/tcad.2007.8361590","title":"Coding for reliable on-chip buses: a class of fundamental bounds and practical codes","display_name":"Coding for reliable on-chip buses: a class of fundamental bounds and practical codes","publication_year":2007,"publication_date":"2007-05-01","ids":{"openalex":"https://openalex.org/W4235014700","doi":"https://doi.org/10.1109/tcad.2007.8361590"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.2007.8361590","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2007.8361590","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084780190","display_name":"Srinivasa R. Sridhara","orcid":null},"institutions":[{"id":"https://openalex.org/I74760111","display_name":"Texas Instruments (United States)","ror":"https://ror.org/03vsmv677","country_code":"US","type":"company","lineage":["https://openalex.org/I74760111"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Srinivasa R. Sridhara","raw_affiliation_strings":["DSP Solutions R&D Center, Texas Instruments, Dallas, TX 75243 USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"DSP Solutions R&D Center, Texas Instruments, Dallas, TX 75243 USA","institution_ids":["https://openalex.org/I74760111"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5057014407","display_name":"Naresh R. Shanbhag","orcid":"https://orcid.org/0000-0002-4323-9164"},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Naresh R. Shanbhag","raw_affiliation_strings":["Coordinated Science Laboratory and the Department of Electrical and Computer Engineering, University of Illinois, Urbana\u2013Champaign, IL 61801 USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Coordinated Science Laboratory and the Department of Electrical and Computer Engineering, University of Illinois, Urbana\u2013Champaign, IL 61801 USA","institution_ids":["https://openalex.org/I157725225"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":{"value":0.43780258,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"26","issue":"5","first_page":"977","last_page":"982"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.9969000220298767,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/codec","display_name":"Codec","score":0.7490534782409668},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6623901128768921},{"id":"https://openalex.org/keywords/coding","display_name":"Coding (social sciences)","score":0.5339540243148804},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5175856351852417},{"id":"https://openalex.org/keywords/system-bus","display_name":"System bus","score":0.5121653079986572},{"id":"https://openalex.org/keywords/swing","display_name":"Swing","score":0.501582145690918},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4965725541114807},{"id":"https://openalex.org/keywords/crosstalk","display_name":"Crosstalk","score":0.4846237599849701},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.4645186960697174},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.44472232460975647},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.4424092173576355},{"id":"https://openalex.org/keywords/error-detection-and-correction","display_name":"Error detection and correction","score":0.4367862641811371},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.30287879705429077},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.2369549572467804},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.23297974467277527},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.20164307951927185},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.18820083141326904},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18723484873771667},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.11820614337921143}],"concepts":[{"id":"https://openalex.org/C161765866","wikidata":"https://www.wikidata.org/wiki/Q184748","display_name":"Codec","level":2,"score":0.7490534782409668},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6623901128768921},{"id":"https://openalex.org/C179518139","wikidata":"https://www.wikidata.org/wiki/Q5140297","display_name":"Coding (social sciences)","level":2,"score":0.5339540243148804},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5175856351852417},{"id":"https://openalex.org/C136321198","wikidata":"https://www.wikidata.org/wiki/Q2377054","display_name":"System bus","level":2,"score":0.5121653079986572},{"id":"https://openalex.org/C65655974","wikidata":"https://www.wikidata.org/wiki/Q14867674","display_name":"Swing","level":2,"score":0.501582145690918},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4965725541114807},{"id":"https://openalex.org/C169822122","wikidata":"https://www.wikidata.org/wiki/Q230187","display_name":"Crosstalk","level":2,"score":0.4846237599849701},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.4645186960697174},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.44472232460975647},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.4424092173576355},{"id":"https://openalex.org/C103088060","wikidata":"https://www.wikidata.org/wiki/Q1062839","display_name":"Error detection and correction","level":2,"score":0.4367862641811371},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.30287879705429077},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.2369549572467804},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.23297974467277527},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.20164307951927185},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.18820083141326904},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18723484873771667},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.11820614337921143},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.2007.8361590","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.2007.8361590","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8999999761581421}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2360051520","https://openalex.org/W2798244654","https://openalex.org/W34871393","https://openalex.org/W3168108534","https://openalex.org/W1486689224","https://openalex.org/W2094697992","https://openalex.org/W4229574949","https://openalex.org/W2368813785","https://openalex.org/W2998806118","https://openalex.org/W842509023"],"abstract_inverted_index":{"A":[0],"reliable":[1],"high-speed":[2],"bus":[3,13,27,86],"employing":[4],"low-swing":[5,93],"signaling":[6],"can":[7],"be":[8],"designed":[9],"by":[10],"encoding":[11],"the":[12,38,69,77,97,108],"to":[14,43,82],"prevent":[15],"crosstalk":[16,46],"and":[17,29,48,103],"provide":[18,44],"error":[19,49],"correction.":[20],"Coding":[21],"for":[22],"on-chip":[23],"buses":[24],"requires":[25],"additional":[26],"wires":[28,41,72],"codec":[30,66],"circuits.":[31],"In":[32],"this":[33],"paper,":[34],"fundamental":[35,78],"bounds":[36],"on":[37],"number":[39,70],"of":[40,71,76,96,110],"required":[42],"joint":[45],"avoidance":[47],"correction":[50],"using":[51],"memoryless":[52],"codes":[53,99],"are":[54],"presented.":[55],"The":[56],"authors":[57],"propose":[58],"a":[59,83,88],"code":[60],"construction":[61],"that":[62],"results":[63],"in":[64,87,118],"practical":[65],"circuits":[67],"with":[68,92],"being":[73],"within":[74],"35%":[75],"bounds.":[79],"When":[80],"applied":[81],"10-mm":[84],"32-bit":[85],"0.13-\u03bcm":[89],"CMOS":[90],"technology":[91],"signaling,":[94],"one":[95],"proposed":[98],"provides":[100],"2.14\u00d7":[101],"speedup":[102],"27.5%":[104],"energy":[105],"savings":[106],"at":[107],"cost":[109],"2.1\u00d7":[111],"area":[112],"overhead,":[113],"but":[114],"without":[115],"any":[116],"loss":[117],"reliability.":[119]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":3},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":2},{"year":2013,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
