{"id":"https://openalex.org/W2069246068","doi":"https://doi.org/10.1109/tcad.1987.1270316","title":"Accelerated Fault Simulation and Fault Grading in Combinational Circuits","display_name":"Accelerated Fault Simulation and Fault Grading in Combinational Circuits","publication_year":1987,"publication_date":"1987-09-01","ids":{"openalex":"https://openalex.org/W2069246068","doi":"https://doi.org/10.1109/tcad.1987.1270316","mag":"2069246068"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.1987.1270316","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.1987.1270316","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5078376261","display_name":"K. Antreich","orcid":null},"institutions":[{"id":"https://openalex.org/I62916508","display_name":"Technical University of Munich","ror":"https://ror.org/02kkvpp62","country_code":"DE","type":"education","lineage":["https://openalex.org/I62916508"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"K.J. Antreich","raw_affiliation_strings":["Institute of Computer Aided Design Department of Electrical Engineering, Technical University Munich, Munich, Germany","Institute of Computer Aided Design, Department of Electrical Engineering, Technical University of Munich, Munich, Germany"],"affiliations":[{"raw_affiliation_string":"Institute of Computer Aided Design Department of Electrical Engineering, Technical University Munich, Munich, Germany","institution_ids":["https://openalex.org/I62916508"]},{"raw_affiliation_string":"Institute of Computer Aided Design, Department of Electrical Engineering, Technical University of Munich, Munich, Germany","institution_ids":["https://openalex.org/I62916508"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5049393322","display_name":"Michael Schulz","orcid":"https://orcid.org/0000-0002-0811-9589"},"institutions":[{"id":"https://openalex.org/I62916508","display_name":"Technical University of Munich","ror":"https://ror.org/02kkvpp62","country_code":"DE","type":"education","lineage":["https://openalex.org/I62916508"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"M.H. Schulz","raw_affiliation_strings":["Institute of Computer Aided Design Department of Electrical Engineering, Technical University Munich, Munich, Germany","[Institute of Computer Aided Design Department of Electrical Engineering, Technical University Munich, Munich, Germany]"],"affiliations":[{"raw_affiliation_string":"Institute of Computer Aided Design Department of Electrical Engineering, Technical University Munich, Munich, Germany","institution_ids":["https://openalex.org/I62916508"]},{"raw_affiliation_string":"[Institute of Computer Aided Design Department of Electrical Engineering, Technical University Munich, Munich, Germany]","institution_ids":["https://openalex.org/I62916508"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5078376261"],"corresponding_institution_ids":["https://openalex.org/I62916508"],"apc_list":null,"apc_paid":null,"fwci":7.0575,"has_fulltext":false,"cited_by_count":123,"citation_normalized_percentile":{"value":0.97672253,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"6","issue":"5","first_page":"704","last_page":"712"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.769182026386261},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.5223837494850159},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5106986165046692},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.49229562282562256},{"id":"https://openalex.org/keywords/grading","display_name":"Grading (engineering)","score":0.42070814967155457},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4157070517539978},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2576543092727661},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22329702973365784},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.17494386434555054},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.11714839935302734},{"id":"https://openalex.org/keywords/seismology","display_name":"Seismology","score":0.07417181134223938},{"id":"https://openalex.org/keywords/geology","display_name":"Geology","score":0.07251855731010437}],"concepts":[{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.769182026386261},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.5223837494850159},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5106986165046692},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.49229562282562256},{"id":"https://openalex.org/C2777286243","wikidata":"https://www.wikidata.org/wiki/Q5591926","display_name":"Grading (engineering)","level":2,"score":0.42070814967155457},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4157070517539978},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2576543092727661},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22329702973365784},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.17494386434555054},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.11714839935302734},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.07417181134223938},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.07251855731010437},{"id":"https://openalex.org/C147176958","wikidata":"https://www.wikidata.org/wiki/Q77590","display_name":"Civil engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.1987.1270316","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.1987.1270316","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W30844492","https://openalex.org/W60738651","https://openalex.org/W155047761","https://openalex.org/W175272751","https://openalex.org/W1508214910","https://openalex.org/W2004437077","https://openalex.org/W2004822931","https://openalex.org/W2021218329","https://openalex.org/W2055261949","https://openalex.org/W2096110076","https://openalex.org/W2104365339","https://openalex.org/W2126693329","https://openalex.org/W2740969876","https://openalex.org/W4236231374","https://openalex.org/W4244274599","https://openalex.org/W4252197513","https://openalex.org/W6601278884","https://openalex.org/W6630468703","https://openalex.org/W6651354974","https://openalex.org/W6678797189"],"related_works":["https://openalex.org/W2064165679","https://openalex.org/W1588461101","https://openalex.org/W3208525924","https://openalex.org/W2591833644","https://openalex.org/W2885058781","https://openalex.org/W3127248583","https://openalex.org/W3167886223","https://openalex.org/W1552490082","https://openalex.org/W4236439135","https://openalex.org/W2189583758"],"abstract_inverted_index":{"The":[0],"principles":[1],"of":[2,14,22,31,42,62,67,75,92,95,103,109],"fault":[3,6,24,51,54,81],"simulation":[4,25,52,82],"and":[5,30,53,88],"grading":[7],"are":[8,46],"introduced":[9],"by":[10],"a":[11,35,80,101],"general":[12],"description":[13],"the":[15,19,27,39,43,68,73,96,107,110],"problem.":[16],"Based":[17],"upon":[18],"well-known":[20],"concept":[21],"restricting":[23],"to":[26,48,84],"fanout":[28,76],"stems":[29,77],"combining":[32],"it":[33],"with":[34,100],"backward":[36],"traversal":[37],"inside":[38],"fanout-free":[40],"regions":[41],"circuit,":[44],"proposals":[45,57],"presented":[47],"further":[49],"accelerate":[50],"grading.":[55],"These":[56],"aim":[58],"at":[59,64,71,89],"parallel":[60],"processing":[61],"patterns":[63],"all":[65],"stages":[66],"calculation":[69],"procedure,":[70],"reducing":[72],"number":[74],"for":[78],"which":[79],"has":[83],"be":[85],"carried":[86],"out,":[87],"taking":[90],"advantage":[91],"structural":[93],"characteristics":[94],"circuit.":[97],"An":[98],"experiment":[99],"set":[102],"benchmark":[104],"circuits":[105],"demonstrates":[106],"efficiency":[108],"proposed":[111],"approaches.":[112]},"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2015,"cited_by_count":4},{"year":2014,"cited_by_count":3},{"year":2012,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}