{"id":"https://openalex.org/W2031587762","doi":"https://doi.org/10.1109/tcad.1987.1270282","title":"Compaction-Based Custom LSI Layout Design Method","display_name":"Compaction-Based Custom LSI Layout Design Method","publication_year":1987,"publication_date":"1987-05-01","ids":{"openalex":"https://openalex.org/W2031587762","doi":"https://doi.org/10.1109/tcad.1987.1270282","mag":"2031587762"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.1987.1270282","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.1987.1270282","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5010897098","display_name":"Masatoshi Ishikawa","orcid":"https://orcid.org/0000-0002-6096-830X"},"institutions":[{"id":"https://openalex.org/I118347220","display_name":"NEC (Japan)","ror":"https://ror.org/04jndar25","country_code":"JP","type":"company","lineage":["https://openalex.org/I118347220"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"M. Ishikawa","raw_affiliation_strings":["C & C Systems Research Laboratories, NEC Corporation Limited, Japan","C & C Systems Research Laboratories, NEC Corporation, Kawasaki, JAPAN"],"affiliations":[{"raw_affiliation_string":"C & C Systems Research Laboratories, NEC Corporation Limited, Japan","institution_ids":["https://openalex.org/I118347220"]},{"raw_affiliation_string":"C & C Systems Research Laboratories, NEC Corporation, Kawasaki, JAPAN","institution_ids":["https://openalex.org/I118347220"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5000123153","display_name":"T. Matsuda","orcid":null},"institutions":[{"id":"https://openalex.org/I118347220","display_name":"NEC (Japan)","ror":"https://ror.org/04jndar25","country_code":"JP","type":"company","lineage":["https://openalex.org/I118347220"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"T. Matsuda","raw_affiliation_strings":["VLSI CAD Engineering Division, NEC Corporation Limited, Japan","[NEC Corp.]"],"affiliations":[{"raw_affiliation_string":"VLSI CAD Engineering Division, NEC Corporation Limited, Japan","institution_ids":["https://openalex.org/I118347220"]},{"raw_affiliation_string":"[NEC Corp.]","institution_ids":["https://openalex.org/I118347220"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101886411","display_name":"Takeshi Yoshimura","orcid":"https://orcid.org/0000-0002-7147-4225"},"institutions":[{"id":"https://openalex.org/I118347220","display_name":"NEC (Japan)","ror":"https://ror.org/04jndar25","country_code":"JP","type":"company","lineage":["https://openalex.org/I118347220"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"T. Yoshimura","raw_affiliation_strings":["C & C Systems Research Laboratories, NEC Corporation Limited, Japan","[NEC Corp.]"],"affiliations":[{"raw_affiliation_string":"C & C Systems Research Laboratories, NEC Corporation Limited, Japan","institution_ids":["https://openalex.org/I118347220"]},{"raw_affiliation_string":"[NEC Corp.]","institution_ids":["https://openalex.org/I118347220"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101825973","display_name":"Satoshi Goto","orcid":"https://orcid.org/0000-0002-6387-048X"},"institutions":[{"id":"https://openalex.org/I118347220","display_name":"NEC (Japan)","ror":"https://ror.org/04jndar25","country_code":"JP","type":"company","lineage":["https://openalex.org/I118347220"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"S. Goto","raw_affiliation_strings":["C & C Systems Research Laboratories, NEC Corporation Limited, Japan","[NEC Corp.]"],"affiliations":[{"raw_affiliation_string":"C & C Systems Research Laboratories, NEC Corporation Limited, Japan","institution_ids":["https://openalex.org/I118347220"]},{"raw_affiliation_string":"[NEC Corp.]","institution_ids":["https://openalex.org/I118347220"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5010897098"],"corresponding_institution_ids":["https://openalex.org/I118347220"],"apc_list":null,"apc_paid":null,"fwci":0.5232,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.6587636,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"6","issue":"3","first_page":"374","last_page":"382"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/page-layout","display_name":"Page layout","score":0.7444223165512085},{"id":"https://openalex.org/keywords/design-layout-record","display_name":"Design layout record","score":0.7114025354385376},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.6511200666427612},{"id":"https://openalex.org/keywords/ic-layout-editor","display_name":"IC layout editor","score":0.6428315043449402},{"id":"https://openalex.org/keywords/compaction","display_name":"Compaction","score":0.6116613149642944},{"id":"https://openalex.org/keywords/integrated-circuit-layout","display_name":"Integrated circuit layout","score":0.5618677735328674},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5438261032104492},{"id":"https://openalex.org/keywords/engineering-drawing","display_name":"Engineering drawing","score":0.3584330976009369},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.29850655794143677},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.22497481107711792},{"id":"https://openalex.org/keywords/circuit-extraction","display_name":"Circuit extraction","score":0.21312499046325684},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.10115593671798706}],"concepts":[{"id":"https://openalex.org/C188985296","wikidata":"https://www.wikidata.org/wiki/Q868954","display_name":"Page layout","level":2,"score":0.7444223165512085},{"id":"https://openalex.org/C179145894","wikidata":"https://www.wikidata.org/wiki/Q5264353","display_name":"Design layout record","level":5,"score":0.7114025354385376},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.6511200666427612},{"id":"https://openalex.org/C5546195","wikidata":"https://www.wikidata.org/wiki/Q5969842","display_name":"IC layout editor","level":5,"score":0.6428315043449402},{"id":"https://openalex.org/C196715460","wikidata":"https://www.wikidata.org/wiki/Q1414356","display_name":"Compaction","level":2,"score":0.6116613149642944},{"id":"https://openalex.org/C2765594","wikidata":"https://www.wikidata.org/wiki/Q2624187","display_name":"Integrated circuit layout","level":3,"score":0.5618677735328674},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5438261032104492},{"id":"https://openalex.org/C199639397","wikidata":"https://www.wikidata.org/wiki/Q1788588","display_name":"Engineering drawing","level":1,"score":0.3584330976009369},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.29850655794143677},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.22497481107711792},{"id":"https://openalex.org/C26490066","wikidata":"https://www.wikidata.org/wiki/Q17006835","display_name":"Circuit extraction","level":4,"score":0.21312499046325684},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.10115593671798706},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C187320778","wikidata":"https://www.wikidata.org/wiki/Q1349130","display_name":"Geotechnical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C144133560","wikidata":"https://www.wikidata.org/wiki/Q4830453","display_name":"Business","level":0,"score":0.0},{"id":"https://openalex.org/C112698675","wikidata":"https://www.wikidata.org/wiki/Q37038","display_name":"Advertising","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C23572009","wikidata":"https://www.wikidata.org/wiki/Q964981","display_name":"Equivalent circuit","level":3,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.1987.1270282","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.1987.1270282","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W1486059480","https://openalex.org/W1987980734","https://openalex.org/W1989727057","https://openalex.org/W1992273002","https://openalex.org/W2010124937","https://openalex.org/W2079248440","https://openalex.org/W2079296661","https://openalex.org/W2122100945","https://openalex.org/W2140501157","https://openalex.org/W2153580689","https://openalex.org/W2295732415","https://openalex.org/W2404136673","https://openalex.org/W3206023314","https://openalex.org/W4232601364","https://openalex.org/W4233678853","https://openalex.org/W4237288420","https://openalex.org/W4240226712","https://openalex.org/W4285719527","https://openalex.org/W6629006960","https://openalex.org/W6680867245","https://openalex.org/W6713945192"],"related_works":["https://openalex.org/W2091329789","https://openalex.org/W2357425846","https://openalex.org/W2595178692","https://openalex.org/W583900352","https://openalex.org/W2248366743","https://openalex.org/W2376028644","https://openalex.org/W1964352816","https://openalex.org/W2347826081","https://openalex.org/W2043447162","https://openalex.org/W2583707817"],"abstract_inverted_index":{"This":[0,11],"paper":[1],"presents":[2],"a":[3,75],"new":[4],"design":[5,30,68],"method":[6,12,50,69],"for":[7,73],"custom":[8,65],"LSI":[9,66],"layouts.":[10,61],"is":[13,51,70],"based":[14],"on":[15],"layout":[16,49,67,78],"compaction":[17],"with":[18],"automatic":[19],"jog":[20],"(wiring":[21],"bend)":[22],"generation":[23],"in":[24],"the":[25,41,47],"layout.":[26],"A":[27],"dense":[28],"chip":[29,42,77],"can":[31],"be":[32],"realized":[33],"by":[34,45],"this":[35,63],"technique.":[36],"Experimental":[37],"results":[38],"show":[39],"that":[40,57],"size":[43],"designed":[44],"using":[46],"proposed":[48],"only":[52],"1.2-1.4":[53],"times":[54],"larger":[55],"than":[56],"resulting":[58],"from":[59],"manual":[60],"Therefore,":[62],"compaction-based":[64],"very":[71],"effective":[72],"achieving":[74],"minimal":[76],"design.":[79]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}