{"id":"https://openalex.org/W1967190281","doi":"https://doi.org/10.1109/tcad.1986.1270198","title":"Standard Description Form for Device Characteristics in VLSI's","display_name":"Standard Description Form for Device Characteristics in VLSI's","publication_year":1986,"publication_date":"1986-04-01","ids":{"openalex":"https://openalex.org/W1967190281","doi":"https://doi.org/10.1109/tcad.1986.1270198","mag":"1967190281"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.1986.1270198","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.1986.1270198","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5041032404","display_name":"M. Sugimoto","orcid":"https://orcid.org/0000-0002-7752-4617"},"institutions":[{"id":"https://openalex.org/I118347220","display_name":"NEC (Japan)","ror":"https://ror.org/04jndar25","country_code":"JP","type":"company","lineage":["https://openalex.org/I118347220"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"M. Sugimoto","raw_affiliation_strings":["Microelectronics Research Laboratories, NEC Corporation Limited, Kawasaki, Japan","Microelectronics Research Laboratories, NEC Corporation, Miyamaeku, Kawasaki, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microelectronics Research Laboratories, NEC Corporation Limited, Kawasaki, Japan","institution_ids":["https://openalex.org/I118347220"]},{"raw_affiliation_string":"Microelectronics Research Laboratories, NEC Corporation, Miyamaeku, Kawasaki, Japan","institution_ids":["https://openalex.org/I118347220"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5040578167","display_name":"M. Fukuma","orcid":null},"institutions":[{"id":"https://openalex.org/I118347220","display_name":"NEC (Japan)","ror":"https://ror.org/04jndar25","country_code":"JP","type":"company","lineage":["https://openalex.org/I118347220"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"M. Fukuma","raw_affiliation_strings":["Microelectronics Research Laboratories, NEC Corporation Limited, Kawasaki, Japan","[Microelectronics Research Laboratories, NEC Corporation Limited, Kawasaki, Japan]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microelectronics Research Laboratories, NEC Corporation Limited, Kawasaki, Japan","institution_ids":["https://openalex.org/I118347220"]},{"raw_affiliation_string":"[Microelectronics Research Laboratories, NEC Corporation Limited, Kawasaki, Japan]","institution_ids":["https://openalex.org/I118347220"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.5524,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.6463822,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"5","issue":"2","first_page":"293","last_page":"302"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9950000047683716,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.8557866811752319},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6825506091117859},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5824260711669922},{"id":"https://openalex.org/keywords/component","display_name":"Component (thermodynamics)","score":0.5805759429931641},{"id":"https://openalex.org/keywords/cad","display_name":"CAD","score":0.49515023827552795},{"id":"https://openalex.org/keywords/standard-cell","display_name":"Standard cell","score":0.4712275266647339},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.4193170368671417},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3944280445575714},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3710567355155945},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.3032473921775818},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3010842502117157},{"id":"https://openalex.org/keywords/engineering-drawing","display_name":"Engineering drawing","score":0.22209107875823975},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16880783438682556},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.05989763140678406}],"concepts":[{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.8557866811752319},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6825506091117859},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5824260711669922},{"id":"https://openalex.org/C168167062","wikidata":"https://www.wikidata.org/wiki/Q1117970","display_name":"Component (thermodynamics)","level":2,"score":0.5805759429931641},{"id":"https://openalex.org/C194789388","wikidata":"https://www.wikidata.org/wiki/Q17855283","display_name":"CAD","level":2,"score":0.49515023827552795},{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.4712275266647339},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.4193170368671417},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3944280445575714},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3710567355155945},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.3032473921775818},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3010842502117157},{"id":"https://openalex.org/C199639397","wikidata":"https://www.wikidata.org/wiki/Q1788588","display_name":"Engineering drawing","level":1,"score":0.22209107875823975},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16880783438682556},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.05989763140678406},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.1986.1270198","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.1986.1270198","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1487498630","https://openalex.org/W1969625434","https://openalex.org/W2032437190","https://openalex.org/W2048308239","https://openalex.org/W2085203436","https://openalex.org/W6629138775"],"related_works":["https://openalex.org/W2103645363","https://openalex.org/W2072989701","https://openalex.org/W1738647919","https://openalex.org/W3000179092","https://openalex.org/W2050511294","https://openalex.org/W1986774039","https://openalex.org/W2118321428","https://openalex.org/W1965232212","https://openalex.org/W2376028644","https://openalex.org/W2126379574"],"abstract_inverted_index":{"A":[0,57],"standard":[1,15,73,85,96],"form":[2,17,28,74],"is":[3,29,68],"presented":[4,70],"for":[5,18,25,121],"describing":[6],"device":[7,19,54,64,78,99],"characteristics":[8,20],"in":[9,83,106],"VLSI's.":[10,26],"It":[11,43],"serves":[12],"as":[13,36,71],"a":[14,37,72],"interchange":[16],"between":[21],"various":[22,98],"design":[23,109],"tools":[24],"The":[27],"designed":[30],"such":[31],"that":[32],"any":[33],"relevant":[34],"characteristic":[35],"circuit":[38,66],"component":[39],"can":[40,87],"be":[41,88,104],"described.":[42],"also":[44,69],"makes":[45,112],"it":[46,113],"possible":[47,114],"to":[48,103,115],"process":[49],"an":[50],"enormous":[51],"amount":[52],"of":[53],"data":[55],"efficiently.":[56],"newly":[58],"developed":[59],"CAD":[60],"system,":[61],"which":[62,80,111],"integrates":[63],"and":[65,119],"simulators,":[67],"application":[75],"example.":[76],"Any":[77],"simulator,":[79],"has":[81],"outputs":[82],"the":[84,91,95],"form,":[86,97],"implemented":[89],"into":[90],"system.":[92],"By":[93],"using":[94,123],"simulators":[100],"are":[101],"able":[102],"used":[105],"total":[107],"LSI":[108,122],"systems,":[110],"execute":[116],"accurate":[117],"simulations":[118],"designs":[120],"recent":[124],"fine":[125],"pattern":[126],"technologies.":[127]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}