{"id":"https://openalex.org/W2018493001","doi":"https://doi.org/10.1109/tcad.1985.1270168","title":"Simulation of MOS Circuits by Decision Diagrams","display_name":"Simulation of MOS Circuits by Decision Diagrams","publication_year":1985,"publication_date":"1985-10-01","ids":{"openalex":"https://openalex.org/W2018493001","doi":"https://doi.org/10.1109/tcad.1985.1270168","mag":"2018493001"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.1985.1270168","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.1985.1270168","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5107825553","display_name":"E. Cerny","orcid":null},"institutions":[{"id":"https://openalex.org/I70931966","display_name":"Universit\u00e9 de Montr\u00e9al","ror":"https://ror.org/0161xgx34","country_code":"CA","type":"education","lineage":["https://openalex.org/I70931966"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"E. Cerny","raw_affiliation_strings":["Departement d' Informatique et de Recherche Operationnelle(I.R.O), University of Montreal, Montreal, QUE, Canada","[Departement d' Informatique et de Recherche Operationnelle(I.R.O), University of Montreal, Montreal, QUE, Canada]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Departement d' Informatique et de Recherche Operationnelle(I.R.O), University of Montreal, Montreal, QUE, Canada","institution_ids":["https://openalex.org/I70931966"]},{"raw_affiliation_string":"[Departement d' Informatique et de Recherche Operationnelle(I.R.O), University of Montreal, Montreal, QUE, Canada]","institution_ids":["https://openalex.org/I70931966"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5013528471","display_name":"J. Gecsei","orcid":null},"institutions":[{"id":"https://openalex.org/I70931966","display_name":"Universit\u00e9 de Montr\u00e9al","ror":"https://ror.org/0161xgx34","country_code":"CA","type":"education","lineage":["https://openalex.org/I70931966"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"J. Gecsei","raw_affiliation_strings":["Departement d' Informatique et de Recherche Operationnelle(I.R.O), University of Montreal, Montreal, QUE, Canada","[Departement d' Informatique et de Recherche Operationnelle(I.R.O), University of Montreal, Montreal, QUE, Canada]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Departement d' Informatique et de Recherche Operationnelle(I.R.O), University of Montreal, Montreal, QUE, Canada","institution_ids":["https://openalex.org/I70931966"]},{"raw_affiliation_string":"[Departement d' Informatique et de Recherche Operationnelle(I.R.O), University of Montreal, Montreal, QUE, Canada]","institution_ids":["https://openalex.org/I70931966"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I70931966"],"apc_list":{"value":2645,"currency":"USD","value_usd":2645},"apc_paid":null,"fwci":6.569,"has_fulltext":false,"cited_by_count":41,"citation_normalized_percentile":{"value":0.96890377,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"4","issue":"4","first_page":"685","last_page":"693"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.994700014591217,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9937999844551086,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.6310036182403564},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6295873522758484},{"id":"https://openalex.org/keywords/state-diagram","display_name":"State diagram","score":0.5223309397697449},{"id":"https://openalex.org/keywords/influence-diagram","display_name":"Influence diagram","score":0.5174422860145569},{"id":"https://openalex.org/keywords/state","display_name":"State (computer science)","score":0.47835037112236023},{"id":"https://openalex.org/keywords/circuit-diagram","display_name":"Circuit diagram","score":0.4655737578868866},{"id":"https://openalex.org/keywords/diagram","display_name":"Diagram","score":0.4380021393299103},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.33954185247421265},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3365022540092468},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2572217583656311},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.25585484504699707},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18024501204490662},{"id":"https://openalex.org/keywords/decision-tree","display_name":"Decision tree","score":0.14668521285057068},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.08514246344566345}],"concepts":[{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.6310036182403564},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6295873522758484},{"id":"https://openalex.org/C16671368","wikidata":"https://www.wikidata.org/wiki/Q230885","display_name":"State diagram","level":3,"score":0.5223309397697449},{"id":"https://openalex.org/C20837028","wikidata":"https://www.wikidata.org/wiki/Q623966","display_name":"Influence diagram","level":3,"score":0.5174422860145569},{"id":"https://openalex.org/C48103436","wikidata":"https://www.wikidata.org/wiki/Q599031","display_name":"State (computer science)","level":2,"score":0.47835037112236023},{"id":"https://openalex.org/C39799792","wikidata":"https://www.wikidata.org/wiki/Q1045991","display_name":"Circuit diagram","level":2,"score":0.4655737578868866},{"id":"https://openalex.org/C186399060","wikidata":"https://www.wikidata.org/wiki/Q959962","display_name":"Diagram","level":2,"score":0.4380021393299103},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.33954185247421265},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3365022540092468},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2572217583656311},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.25585484504699707},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18024501204490662},{"id":"https://openalex.org/C84525736","wikidata":"https://www.wikidata.org/wiki/Q831366","display_name":"Decision tree","level":2,"score":0.14668521285057068},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.08514246344566345},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.1985.1270168","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.1985.1270168","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1695573793","https://openalex.org/W1797398192","https://openalex.org/W1994143452","https://openalex.org/W2044146725","https://openalex.org/W2059454390","https://openalex.org/W2069697566","https://openalex.org/W2070617947","https://openalex.org/W2089448146","https://openalex.org/W2115519855","https://openalex.org/W2168139560","https://openalex.org/W4240391655"],"related_works":["https://openalex.org/W2952519470","https://openalex.org/W2375316050","https://openalex.org/W4302444059","https://openalex.org/W1973087355","https://openalex.org/W2950780278","https://openalex.org/W2376985206","https://openalex.org/W2029321550","https://openalex.org/W2163107951","https://openalex.org/W2365818017","https://openalex.org/W2387073443"],"abstract_inverted_index":{"This":[0],"paper":[1],"describes":[2],"a":[3,30,52,73],"novel":[4],"approach":[5],"to":[6,64],"switch-level":[7],"simulation":[8],"of":[9,29,44,60],"MOS":[10],"circuits.":[11],"The":[12,42,68],"circuit":[13],"is":[14,25,35],"first":[15],"partitioned":[16],"into":[17],"connector-switch":[18],"networks":[19],"CSN":[20,24],"[4].":[21],"Then":[22],"each":[23],"represented":[26],"in":[27,40],"terms":[28],"decision":[31],"diagram":[32],"DD,":[33],"which":[34],"particularly":[36],"suitable":[37],"for":[38],"use":[39],"simulators.":[41],"advantages":[43],"DD's":[45],"are":[46,49,70],"that":[47],"they":[48,56],"based":[50],"on":[51],"solid":[53],"theory":[54],"and":[55],"permit":[57],"fast":[58],"evaluation":[59],"the":[61],"network's":[62],"response":[63],"any":[65],"input":[66],"vector.":[67],"CSN's":[69],"coupled":[71],"through":[72],"3-state":[74],"automaton":[75],"representing":[76],"charge":[77],"wells":[78],"associated":[79],"with":[80],"transistor":[81],"gates.":[82]},"counts_by_year":[{"year":2013,"cited_by_count":1}],"updated_date":"2026-08-21T09:56:20.448147","created_date":"2025-10-10T00:00:00"}