{"id":"https://openalex.org/W1967889613","doi":"https://doi.org/10.1109/tcad.1985.1270162","title":"A Statistical Model Including Parameter Matching for Analog Integrated Circuits Simulation","display_name":"A Statistical Model Including Parameter Matching for Analog Integrated Circuits Simulation","publication_year":1985,"publication_date":"1985-10-01","ids":{"openalex":"https://openalex.org/W1967889613","doi":"https://doi.org/10.1109/tcad.1985.1270162","mag":"1967889613"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.1985.1270162","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.1985.1270162","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5014593023","display_name":"S. Inohira","orcid":null},"institutions":[{"id":"https://openalex.org/I65143321","display_name":"Hitachi (Japan)","ror":"https://ror.org/02exqgm79","country_code":"JP","type":"company","lineage":["https://openalex.org/I65143321"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"S. Inohira","raw_affiliation_strings":["Hitachi Central Research Laboratory Limited, Kokubunji, Tokyo, Japan","Hitachi Central Research Laboratory Kokubunji Tokyo, Japan"],"affiliations":[{"raw_affiliation_string":"Hitachi Central Research Laboratory Limited, Kokubunji, Tokyo, Japan","institution_ids":["https://openalex.org/I65143321"]},{"raw_affiliation_string":"Hitachi Central Research Laboratory Kokubunji Tokyo, Japan","institution_ids":["https://openalex.org/I65143321"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072788406","display_name":"Toshio Shinmi","orcid":null},"institutions":[{"id":"https://openalex.org/I65143321","display_name":"Hitachi (Japan)","ror":"https://ror.org/02exqgm79","country_code":"JP","type":"company","lineage":["https://openalex.org/I65143321"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"T. Shinmi","raw_affiliation_strings":["Hitachi Central Research Laboratory Limited, Kokubunji, Tokyo, Japan","[Hitachi Central Research Laboratory Limited, Kokubunji, Tokyo, Japan]"],"affiliations":[{"raw_affiliation_string":"Hitachi Central Research Laboratory Limited, Kokubunji, Tokyo, Japan","institution_ids":["https://openalex.org/I65143321"]},{"raw_affiliation_string":"[Hitachi Central Research Laboratory Limited, Kokubunji, Tokyo, Japan]","institution_ids":["https://openalex.org/I65143321"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5017453601","display_name":"M. Nagata","orcid":"https://orcid.org/0000-0002-9196-2082"},"institutions":[{"id":"https://openalex.org/I65143321","display_name":"Hitachi (Japan)","ror":"https://ror.org/02exqgm79","country_code":"JP","type":"company","lineage":["https://openalex.org/I65143321"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"M. Nagata","raw_affiliation_strings":["Hitachi Central Research Laboratory Limited, Kokubunji, Tokyo, Japan","[Hitachi Central Research Laboratory Limited, Kokubunji, Tokyo, Japan]"],"affiliations":[{"raw_affiliation_string":"Hitachi Central Research Laboratory Limited, Kokubunji, Tokyo, Japan","institution_ids":["https://openalex.org/I65143321"]},{"raw_affiliation_string":"[Hitachi Central Research Laboratory Limited, Kokubunji, Tokyo, Japan]","institution_ids":["https://openalex.org/I65143321"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113773898","display_name":"T. Toyabe","orcid":null},"institutions":[{"id":"https://openalex.org/I65143321","display_name":"Hitachi (Japan)","ror":"https://ror.org/02exqgm79","country_code":"JP","type":"company","lineage":["https://openalex.org/I65143321"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"T. Toyabe","raw_affiliation_strings":["Hitachi Central Research Laboratory Limited, Kokubunji, Tokyo, Japan","[Hitachi Central Research Laboratory Limited, Kokubunji, Tokyo, Japan]"],"affiliations":[{"raw_affiliation_string":"Hitachi Central Research Laboratory Limited, Kokubunji, Tokyo, Japan","institution_ids":["https://openalex.org/I65143321"]},{"raw_affiliation_string":"[Hitachi Central Research Laboratory Limited, Kokubunji, Tokyo, Japan]","institution_ids":["https://openalex.org/I65143321"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5054795397","display_name":"K. Iida","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"K. Iida","raw_affiliation_strings":[],"affiliations":[]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5014593023"],"corresponding_institution_ids":["https://openalex.org/I65143321"],"apc_list":null,"apc_paid":null,"fwci":0.5407,"has_fulltext":false,"cited_by_count":21,"citation_normalized_percentile":{"value":0.63382966,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"4","issue":"4","first_page":"621","last_page":"628"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9958999752998352,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9934999942779541,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.5762136578559875},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5726375579833984},{"id":"https://openalex.org/keywords/statistical-model","display_name":"Statistical model","score":0.5483558177947998},{"id":"https://openalex.org/keywords/analogue-electronics","display_name":"Analogue electronics","score":0.5266245007514954},{"id":"https://openalex.org/keywords/matching","display_name":"Matching (statistics)","score":0.5253127217292786},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4783429801464081},{"id":"https://openalex.org/keywords/electronic-circuit-simulation","display_name":"Electronic circuit simulation","score":0.47490179538726807},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.464887797832489},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4496125876903534},{"id":"https://openalex.org/keywords/mixed-signal-integrated-circuit","display_name":"Mixed-signal integrated circuit","score":0.41347160935401917},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3264450430870056},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.20620980858802795},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20291170477867126},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.17336240410804749},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.13857465982437134},{"id":"https://openalex.org/keywords/statistics","display_name":"Statistics","score":0.12292611598968506}],"concepts":[{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.5762136578559875},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5726375579833984},{"id":"https://openalex.org/C114289077","wikidata":"https://www.wikidata.org/wiki/Q3284399","display_name":"Statistical model","level":2,"score":0.5483558177947998},{"id":"https://openalex.org/C29074008","wikidata":"https://www.wikidata.org/wiki/Q174925","display_name":"Analogue electronics","level":3,"score":0.5266245007514954},{"id":"https://openalex.org/C165064840","wikidata":"https://www.wikidata.org/wiki/Q1321061","display_name":"Matching (statistics)","level":2,"score":0.5253127217292786},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4783429801464081},{"id":"https://openalex.org/C46205389","wikidata":"https://www.wikidata.org/wiki/Q1270401","display_name":"Electronic circuit simulation","level":3,"score":0.47490179538726807},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.464887797832489},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4496125876903534},{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.41347160935401917},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3264450430870056},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.20620980858802795},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20291170477867126},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.17336240410804749},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.13857465982437134},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.12292611598968506},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.1985.1270162","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.1985.1270162","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1514773558","https://openalex.org/W1998107007","https://openalex.org/W2030171201","https://openalex.org/W2093949644","https://openalex.org/W2124551145","https://openalex.org/W2142799366","https://openalex.org/W2149025647","https://openalex.org/W3147616483","https://openalex.org/W6630951818"],"related_works":["https://openalex.org/W2031235560","https://openalex.org/W4242258007","https://openalex.org/W2155285526","https://openalex.org/W2394022884","https://openalex.org/W2161335888","https://openalex.org/W2185815555","https://openalex.org/W2071235072","https://openalex.org/W1924227955","https://openalex.org/W4242038055","https://openalex.org/W4318953393"],"abstract_inverted_index":{"This":[0,15],"paper":[1],"describes":[2],"a":[3,75,88,96],"statistical":[4,44,100],"model":[5,16,28,47,91],"for":[6,125],"circuit":[7,13,97,101],"simulation":[8],"that":[9],"predicts":[10],"variations":[11,108],"in":[12,109],"behavior.":[14],"includes":[17],"parameter":[18,107],"matching":[19],"considerations":[20],"critical":[21],"to":[22,130],"analog":[23,110,126],"integrated":[24,39],"circuits":[25],"(IC's).":[26],"The":[27,90],"is":[29,48],"based":[30],"on":[31,74],"experimental":[32],"data":[33],"gathered":[34],"from":[35],"standard":[36],"production":[37],"bipolar-analog":[38],"chips.":[40],"By":[41],"using":[42],"multivariate":[43],"techniques,":[45],"the":[46,51,59,64,70,77,85,116,121,132,135],"constructed":[49],"having":[50],"two":[52],"kinds":[53],"of":[54,63,134],"sub-models.":[55],"One":[56],"sub-model":[57],"uses":[58,79],"eigenvalues":[60],"and":[61,67,83,99],"vectors":[62],"correlation":[65,71,86],"matrix,":[66],"then":[68],"generates":[69,84],"between":[72],"devices":[73],"chip.":[76],"other":[78],"linear":[80],"regression":[81],"equations":[82],"within":[87,115],"device.":[89],"has":[92],"been":[93],"implemented":[94],"into":[95],"simulator":[98],"simulations":[102],"are":[103,112,128],"performed.":[104],"Measured":[105],"device":[106],"IC's":[111,127],"well":[113],"reproduced":[114],"practical":[117],"execution":[118],"time":[119],"by":[120],"model.":[122,136],"Simulation":[123],"examples":[124],"demonstrated":[129],"illustrate":[131],"effectiveness":[133]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}