{"id":"https://openalex.org/W2055388012","doi":"https://doi.org/10.1109/tcad.1985.1270130","title":"A Switch-Level Timing Verifier for Digital MOS VLSI","display_name":"A Switch-Level Timing Verifier for Digital MOS VLSI","publication_year":1985,"publication_date":"1985-07-01","ids":{"openalex":"https://openalex.org/W2055388012","doi":"https://doi.org/10.1109/tcad.1985.1270130","mag":"2055388012"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.1985.1270130","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.1985.1270130","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5012738373","display_name":"John K. Ousterhout","orcid":null},"institutions":[{"id":"https://openalex.org/I95457486","display_name":"University of California, Berkeley","ror":"https://ror.org/01an7q238","country_code":"US","type":"education","lineage":["https://openalex.org/I95457486"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"J.K. Ousterhout","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, University of California, Berkeley, CA, USA","Department of Electrical Engineering and Computer Sciences,University of California, Berkeley, CA, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, University of California, Berkeley, CA, USA","institution_ids":["https://openalex.org/I95457486"]},{"raw_affiliation_string":"Department of Electrical Engineering and Computer Sciences,University of California, Berkeley, CA, USA","institution_ids":["https://openalex.org/I95457486"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5012738373"],"corresponding_institution_ids":["https://openalex.org/I95457486"],"apc_list":null,"apc_paid":null,"fwci":13.7307,"has_fulltext":false,"cited_by_count":247,"citation_normalized_percentile":{"value":0.99353174,"is_in_top_1_percent":true,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"4","issue":"3","first_page":"336","last_page":"349"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6871006488800049},{"id":"https://openalex.org/keywords/nmos-logic","display_name":"NMOS logic","score":0.6557296514511108},{"id":"https://openalex.org/keywords/spice","display_name":"Spice","score":0.5571333765983582},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.556398868560791},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5469227433204651},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.544512152671814},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5203837156295776},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4232778251171112},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.4129834771156311},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3776180148124695},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.24040940403938293},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.23860442638397217},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16825804114341736},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.16213449835777283}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6871006488800049},{"id":"https://openalex.org/C197162436","wikidata":"https://www.wikidata.org/wiki/Q83908","display_name":"NMOS logic","level":4,"score":0.6557296514511108},{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.5571333765983582},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.556398868560791},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5469227433204651},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.544512152671814},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5203837156295776},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4232778251171112},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.4129834771156311},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3776180148124695},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.24040940403938293},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.23860442638397217},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16825804114341736},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.16213449835777283}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.1985.1270130","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.1985.1270130","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5699999928474426,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":23,"referenced_works":["https://openalex.org/W166686269","https://openalex.org/W1497430048","https://openalex.org/W1572101818","https://openalex.org/W1967575124","https://openalex.org/W1992685522","https://openalex.org/W2007846202","https://openalex.org/W2056292591","https://openalex.org/W2059315682","https://openalex.org/W2059454390","https://openalex.org/W2096908507","https://openalex.org/W2144922219","https://openalex.org/W2154363431","https://openalex.org/W2157230896","https://openalex.org/W2170454255","https://openalex.org/W3009317406","https://openalex.org/W4234561472","https://openalex.org/W4235374322","https://openalex.org/W4250005417","https://openalex.org/W4254048485","https://openalex.org/W4254603905","https://openalex.org/W6606730786","https://openalex.org/W6652237624","https://openalex.org/W6681438121"],"related_works":["https://openalex.org/W2217098757","https://openalex.org/W2051630841","https://openalex.org/W2730314563","https://openalex.org/W2120538654","https://openalex.org/W2058541779","https://openalex.org/W2971786152","https://openalex.org/W1632369502","https://openalex.org/W2288945810","https://openalex.org/W1980639873","https://openalex.org/W2991739378"],"abstract_inverted_index":{"Crystal":[0,34,106],"is":[1,61,74,103],"a":[2,17,54,115,119],"timing":[3],"verification":[4],"program":[5,21,52],"for":[6,162],"digital":[7,163],"nMOS":[8],"and":[9,29,80],"CMOS":[10],"circuits.":[11,164],"Using":[12],"the":[13,20,23,31,59,82,93,133,136],"circuit":[14,60],"extracted":[15],"from":[16],"mask":[18],"set,":[19],"determines":[22],"length":[24],"of":[25,47,65,129,160],"each":[26],"clock":[27],"phase":[28],"pinpoints":[30],"longest":[32],"paths.":[33,84],"can":[35],"process":[36],"circuits":[37],"with":[38,72,98],"about":[39,44],"40":[40],"000":[41,144],"transistors":[42,134],"in":[43,57,135],"20-30":[45],"min":[46],"VAX-11/780":[48],"CPU":[49],"time.":[50],"The":[51,139],"uses":[53],"switch-level":[55],"approach":[56],"which":[58,102],"decomposed":[62],"into":[63],"chains":[64],"switches":[66],"called":[67],"stages.":[68],"A":[69],"depth-first":[70],"search,":[71],"pruning,":[73],"used":[75,104],"to":[76,107],"trace":[77],"out":[78],"stages":[79],"locate":[81],"critical":[83],"Bidirectional":[85],"pass":[86],"transistor":[87],"arrays":[88],"are":[89,112,155],"handled":[90],"by":[91,105],"having":[92],"designer":[94],"tag":[95],"such":[96],"structures":[97],"flow":[99],"control":[100],"information,":[101],"avoid":[108],"endless":[109],"searches.":[110],"Delays":[111],"computed":[113],"on":[114,124],"stage-by-stage":[116],"basis,":[117],"using":[118],"simple":[120],"resistor-switch":[121],"model":[122],"based":[123],"rise-time":[125],"ratios":[126],"(a":[127],"measure":[128],"how":[130],"fully":[131],"turned-on":[132],"stage":[137],"are).":[138],"delay":[140,152],"modeler":[141],"executes":[142],"10":[143,158],"times":[145],"as":[146,148],"fast":[147],"SPICE,":[149],"yet":[150],"produces":[151],"estimates":[153],"that":[154],"typically":[156],"within":[157],"percent":[159],"SPICE":[161]},"counts_by_year":[{"year":2012,"cited_by_count":1}],"updated_date":"2026-04-04T16:13:02.066488","created_date":"2025-10-10T00:00:00"}