{"id":"https://openalex.org/W2076243583","doi":"https://doi.org/10.1109/tcad.1985.1270129","title":"A Method of Improving the Terminal Assignment in the Channel Routing for Gate Arrays","display_name":"A Method of Improving the Terminal Assignment in the Channel Routing for Gate Arrays","publication_year":1985,"publication_date":"1985-07-01","ids":{"openalex":"https://openalex.org/W2076243583","doi":"https://doi.org/10.1109/tcad.1985.1270129","mag":"2076243583"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.1985.1270129","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.1985.1270129","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5109328442","display_name":"Masayuki Terai","orcid":null},"institutions":[{"id":"https://openalex.org/I4210133125","display_name":"Mitsubishi Electric (Japan)","ror":"https://ror.org/033y26782","country_code":"JP","type":"company","lineage":["https://openalex.org/I1306287861","https://openalex.org/I4210133125"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"M. Terai","raw_affiliation_strings":["LSI Research and Development Laboratory, Mitsubishi Electric Corporation Limited, Japan","LSI Research and Development Laboratory, Mitsubishi Electric Corporation, Itami, Japan"],"affiliations":[{"raw_affiliation_string":"LSI Research and Development Laboratory, Mitsubishi Electric Corporation Limited, Japan","institution_ids":["https://openalex.org/I4210133125"]},{"raw_affiliation_string":"LSI Research and Development Laboratory, Mitsubishi Electric Corporation, Itami, Japan","institution_ids":["https://openalex.org/I4210133125"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":["https://openalex.org/A5109328442"],"corresponding_institution_ids":["https://openalex.org/I4210133125"],"apc_list":null,"apc_paid":null,"fwci":2.7033,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.89508704,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"4","issue":"3","first_page":"329","last_page":"336"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.996999979019165,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.996999979019165,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9904999732971191,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/router","display_name":"Router","score":0.6428834199905396},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.6302891969680786},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.5377768278121948},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5327073931694031},{"id":"https://openalex.org/keywords/graph","display_name":"Graph","score":0.5084196925163269},{"id":"https://openalex.org/keywords/constraint","display_name":"Constraint (computer-aided design)","score":0.4837782084941864},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4707392156124115},{"id":"https://openalex.org/keywords/destination-sequenced-distance-vector-routing","display_name":"Destination-Sequenced Distance Vector routing","score":0.4569324851036072},{"id":"https://openalex.org/keywords/constraint-graph","display_name":"Constraint graph","score":0.45141860842704773},{"id":"https://openalex.org/keywords/heuristic","display_name":"Heuristic","score":0.4491819143295288},{"id":"https://openalex.org/keywords/routing-table","display_name":"Routing table","score":0.4329395294189453},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.3884032666683197},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.3772227168083191},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.2896192669868469},{"id":"https://openalex.org/keywords/link-state-routing-protocol","display_name":"Link-state routing protocol","score":0.2481352686882019},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.21593594551086426},{"id":"https://openalex.org/keywords/constraint-logic-programming","display_name":"Constraint logic programming","score":0.1860722303390503},{"id":"https://openalex.org/keywords/combinatorics","display_name":"Combinatorics","score":0.1817968189716339},{"id":"https://openalex.org/keywords/routing-protocol","display_name":"Routing protocol","score":0.17819783091545105},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.16819226741790771},{"id":"https://openalex.org/keywords/constraint-programming","display_name":"Constraint programming","score":0.133421391248703}],"concepts":[{"id":"https://openalex.org/C2775896111","wikidata":"https://www.wikidata.org/wiki/Q642560","display_name":"Router","level":2,"score":0.6428834199905396},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.6302891969680786},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.5377768278121948},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5327073931694031},{"id":"https://openalex.org/C132525143","wikidata":"https://www.wikidata.org/wiki/Q141488","display_name":"Graph","level":2,"score":0.5084196925163269},{"id":"https://openalex.org/C2776036281","wikidata":"https://www.wikidata.org/wiki/Q48769818","display_name":"Constraint (computer-aided design)","level":2,"score":0.4837782084941864},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4707392156124115},{"id":"https://openalex.org/C29436982","wikidata":"https://www.wikidata.org/wiki/Q3700557","display_name":"Destination-Sequenced Distance Vector routing","level":5,"score":0.4569324851036072},{"id":"https://openalex.org/C178481205","wikidata":"https://www.wikidata.org/wiki/Q5164372","display_name":"Constraint graph","level":5,"score":0.45141860842704773},{"id":"https://openalex.org/C173801870","wikidata":"https://www.wikidata.org/wiki/Q201413","display_name":"Heuristic","level":2,"score":0.4491819143295288},{"id":"https://openalex.org/C184896649","wikidata":"https://www.wikidata.org/wiki/Q290066","display_name":"Routing table","level":4,"score":0.4329395294189453},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.3884032666683197},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.3772227168083191},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.2896192669868469},{"id":"https://openalex.org/C89305328","wikidata":"https://www.wikidata.org/wiki/Q1755411","display_name":"Link-state routing protocol","level":4,"score":0.2481352686882019},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.21593594551086426},{"id":"https://openalex.org/C176783269","wikidata":"https://www.wikidata.org/wiki/Q5164378","display_name":"Constraint logic programming","level":4,"score":0.1860722303390503},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.1817968189716339},{"id":"https://openalex.org/C104954878","wikidata":"https://www.wikidata.org/wiki/Q1648707","display_name":"Routing protocol","level":3,"score":0.17819783091545105},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.16819226741790771},{"id":"https://openalex.org/C173404611","wikidata":"https://www.wikidata.org/wiki/Q528588","display_name":"Constraint programming","level":3,"score":0.133421391248703},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C137631369","wikidata":"https://www.wikidata.org/wiki/Q7617831","display_name":"Stochastic programming","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.1985.1270129","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.1985.1270129","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1530753374","https://openalex.org/W2083445160","https://openalex.org/W2103499632","https://openalex.org/W2118382442","https://openalex.org/W4256543554","https://openalex.org/W6671475212"],"related_works":["https://openalex.org/W2122026593","https://openalex.org/W1588358165","https://openalex.org/W2481444631","https://openalex.org/W2967687368","https://openalex.org/W2246127887","https://openalex.org/W2362764218","https://openalex.org/W1538818972","https://openalex.org/W2369321817","https://openalex.org/W2157307427","https://openalex.org/W2363058195"],"abstract_inverted_index":{"The":[0],"channel":[1,7,75],"router,":[2],"which":[3],"routes":[4],"a":[5,88,111,173],"rectangular":[6],"with":[8,54],"two":[9],"rows":[10],"of":[11,26,57,92,102,110,122,138,154,175],"terminals":[12,73,181],"along":[13],"its":[14,170],"top":[15],"and":[16],"bottom":[17],"sides,":[18],"is":[19,30,80,142,162,192],"extensively":[20],"used":[21],"for":[22,82],"the":[23,38,45,55,61,67,97,100,106,123,136,145,152,158],"automatic":[24],"routing":[25,36,39],"gate":[27],"arrays.":[28],"It":[29],"well":[31],"known":[32],"that":[33,99,144,188],"in":[34,60,96,105,131,157],"this":[35,83,139,189],"method":[37],"can":[40,114,164],"not":[41,115,151],"be":[42,116,165],"performed":[43],"when":[44,172],"vertical":[46,62,107,159],"constraint":[47,63,108,160],"graph":[48,64,109,161],"contains":[49],"cycles.":[50],"This":[51,85],"paper":[52],"deals":[53],"problem":[56],"eliminating":[58],"cycles":[59,104,156],"by":[65,118,167],"interchanging":[66,119],"nets":[68,93,124,176],"assigned":[69,125,177],"to":[70,94,126,133,148,178],"logically":[71,127,179],"equivalent":[72,128,180],"before":[74],"routing.":[76],"A":[77],"heuristic":[78],"algorithm":[79,86,191],"proposed":[81,190],"problem.":[84],"yields":[87],"locally":[89],"optimum":[90],"assignment":[91,113],"terminals,":[95],"sense":[98],"number":[101,153],"independent":[103,155],"resultant":[112],"reduced":[117,163],"any":[120],"pair":[121,174],"terminals.":[129],"Furthermore,":[130],"order":[132],"speed":[134],"up":[135],"operation":[137],"algorithm,":[140],"it":[141],"shown":[143],"checking":[146],"as":[147],"whether":[149],"or":[150],"done":[166],"noting":[168],"only":[169],"subgraph,":[171],"are":[182],"interchanged.":[183],"Experimental":[184],"results":[185],"have":[186],"indicated":[187],"efficient.":[193]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}