{"id":"https://openalex.org/W2031785826","doi":"https://doi.org/10.1109/tcad.1985.1270102","title":"Technology Independent Device Modeling for Simulation of Integrated Circuits for FET Technologies","display_name":"Technology Independent Device Modeling for Simulation of Integrated Circuits for FET Technologies","publication_year":1985,"publication_date":"1985-01-01","ids":{"openalex":"https://openalex.org/W2031785826","doi":"https://doi.org/10.1109/tcad.1985.1270102","mag":"2031785826"},"language":"en","primary_location":{"id":"doi:10.1109/tcad.1985.1270102","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.1985.1270102","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5089233317","display_name":"G. Bischoff","orcid":null},"institutions":[{"id":"https://openalex.org/I205783295","display_name":"Cornell University","ror":"https://ror.org/05bnh6r87","country_code":"US","type":"education","lineage":["https://openalex.org/I205783295"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"G. Bischoff","raw_affiliation_strings":["School of Electrical Engineering, Cornell University, Ithaca, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical Engineering, Cornell University, Ithaca, NY, USA","institution_ids":["https://openalex.org/I205783295"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5014483707","display_name":"J.P. Krusius","orcid":null},"institutions":[{"id":"https://openalex.org/I205783295","display_name":"Cornell University","ror":"https://ror.org/05bnh6r87","country_code":"US","type":"education","lineage":["https://openalex.org/I205783295"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"J.P. Krusius","raw_affiliation_strings":["School of Electrical Engineering, Cornell University, Ithaca, NY, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical Engineering, Cornell University, Ithaca, NY, USA","institution_ids":["https://openalex.org/I205783295"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I205783295"],"apc_list":{"value":2645,"currency":"USD","value_usd":2645},"apc_paid":null,"fwci":1.0106,"has_fulltext":false,"cited_by_count":20,"citation_normalized_percentile":{"value":0.75102847,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"4","issue":"1","first_page":"99","last_page":"110"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9959999918937683,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9959999918937683,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.988099992275238,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11206","display_name":"Model Reduction and Neural Networks","score":0.9868999719619751,"subfield":{"id":"https://openalex.org/subfields/3109","display_name":"Statistical and Nonlinear Physics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5891793370246887},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.5729544758796692},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5718809962272644},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5687470436096191},{"id":"https://openalex.org/keywords/electronic-circuit-simulation","display_name":"Electronic circuit simulation","score":0.4881916642189026},{"id":"https://openalex.org/keywords/mesfet","display_name":"MESFET","score":0.45345330238342285},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.45328405499458313},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.44809794425964355},{"id":"https://openalex.org/keywords/circuit-extraction","display_name":"Circuit extraction","score":0.44626352190971375},{"id":"https://openalex.org/keywords/spice","display_name":"Spice","score":0.4270648658275604},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.41273587942123413},{"id":"https://openalex.org/keywords/equivalent-circuit","display_name":"Equivalent circuit","score":0.3441450595855713},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2330242395401001},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21736446022987366},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.20255345106124878},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.11595797538757324},{"id":"https://openalex.org/keywords/field-effect-transistor","display_name":"Field-effect transistor","score":0.10083967447280884}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5891793370246887},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.5729544758796692},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5718809962272644},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5687470436096191},{"id":"https://openalex.org/C46205389","wikidata":"https://www.wikidata.org/wiki/Q1270401","display_name":"Electronic circuit simulation","level":3,"score":0.4881916642189026},{"id":"https://openalex.org/C134123091","wikidata":"https://www.wikidata.org/wiki/Q1837339","display_name":"MESFET","level":5,"score":0.45345330238342285},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.45328405499458313},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.44809794425964355},{"id":"https://openalex.org/C26490066","wikidata":"https://www.wikidata.org/wiki/Q17006835","display_name":"Circuit extraction","level":4,"score":0.44626352190971375},{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.4270648658275604},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.41273587942123413},{"id":"https://openalex.org/C23572009","wikidata":"https://www.wikidata.org/wiki/Q964981","display_name":"Equivalent circuit","level":3,"score":0.3441450595855713},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2330242395401001},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21736446022987366},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.20255345106124878},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.11595797538757324},{"id":"https://openalex.org/C145598152","wikidata":"https://www.wikidata.org/wiki/Q176097","display_name":"Field-effect transistor","level":4,"score":0.10083967447280884},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tcad.1985.1270102","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tcad.1985.1270102","pdf_url":null,"source":{"id":"https://openalex.org/S100835903","display_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","issn_l":"0278-0070","issn":["0278-0070","1937-4151"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.5199999809265137}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W1981416010","https://openalex.org/W2029488783","https://openalex.org/W2049389282","https://openalex.org/W2162870748","https://openalex.org/W2172020272"],"related_works":["https://openalex.org/W2216650154","https://openalex.org/W2270132690","https://openalex.org/W2096331031","https://openalex.org/W1972185800","https://openalex.org/W2378655644","https://openalex.org/W2366072341","https://openalex.org/W2517340991","https://openalex.org/W2391157593","https://openalex.org/W2375888161","https://openalex.org/W4248234938"],"abstract_inverted_index":{"A":[0],"novel":[1,148],"approach":[2,15,34,104,151],"to":[3,108],"device":[4,32,99,143,149],"modeling":[5,33,150],"for":[6,73,155,164],"circuit":[7,74,86,111,132,145,156],"simulation":[8,75,87],"of":[9,44,69],"integrated":[10,110],"circuits":[11],"is":[12,16,35,152],"presented.":[13],"This":[14,147],"based":[17],"on":[18],"general":[19],"nonlinear":[20,45],"network":[21],"models":[22,100,129],"in":[23,93,135,138,158],"tensor":[24],"product":[25,41],"spline":[26,42],"representation.":[27],"As":[28],"a":[29],"consequnce":[30],"this":[31],"technology":[36],"independent":[37],"and":[38,59,84,120,130,144,163],"automatable.":[39],"Tensor":[40],"representations":[43],"branch":[46],"elements":[47],"are":[48,55,64,71,91,101,134],"particularly":[49,153],"useful,":[50],"since":[51],"the":[52,85],"controlling":[53],"variables":[54],"typically":[56],"directionally":[57],"dominant":[58],"only":[60],"low":[61],"rank":[62],"tensors":[63],"needed.":[65],"The":[66,103],"basic":[67],"properties":[68],"splines":[70],"reviewed":[72],"applications.":[76],"Device":[77,128],"model":[78],"generation,":[79],"software":[80],"implementation,":[81],"user":[82],"interfaces":[83],"environment":[88],"within":[89],"SPICE":[90],"described":[92],"detail.":[94],"Realistic":[95],"comparisons":[96],"with":[97,141],"conventional":[98],"given.":[102],"has":[105],"been":[106],"applied":[107],"several":[109],"technologies":[112],"(1/2-\u03bcm":[113],"silicon":[114,125],"MESFET":[115],"logic,":[116,119],"7-\u03bcm":[117],"CMOS/SOS":[118],"5-\u03bcm":[121],"metal":[122],"gate":[123],"bulk":[124],"CMOS":[126],"logic).":[127],"simulated":[131],"results":[133],"all":[136],"cases":[137],"excellent":[139],"agreement":[140],"measured":[142],"characteristics.":[146],"suitable":[154],"design":[157],"quickly":[159],"changing":[160],"technological":[161],"environments":[162],"submicron":[165],"VLSI.":[166]},"counts_by_year":[{"year":2013,"cited_by_count":1}],"updated_date":"2026-08-21T09:56:20.448147","created_date":"2025-10-10T00:00:00"}
