{"id":"https://openalex.org/W4312253643","doi":"https://doi.org/10.1109/tc.2022.3214151","title":"Eidetic: An In-Memory Matrix Multiplication Accelerator for Neural Networks","display_name":"Eidetic: An In-Memory Matrix Multiplication Accelerator for Neural Networks","publication_year":2022,"publication_date":"2022-10-12","ids":{"openalex":"https://openalex.org/W4312253643","doi":"https://doi.org/10.1109/tc.2022.3214151"},"language":"en","primary_location":{"id":"doi:10.1109/tc.2022.3214151","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.2022.3214151","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","0016-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5002634808","display_name":"Charles A. Eckert","orcid":"https://orcid.org/0000-0002-8839-9890"},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Charles Eckert","raw_affiliation_strings":["Department of Computer Science and Engineering, University of Michigan, Ann Arbor, MI, USA"],"raw_orcid":"https://orcid.org/0000-0002-8839-9890","affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, University of Michigan, Ann Arbor, MI, USA","institution_ids":["https://openalex.org/I27837315"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051897310","display_name":"Arun Subramaniyan","orcid":"https://orcid.org/0000-0001-6119-3182"},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Arun Subramaniyan","raw_affiliation_strings":["Department of Computer Science and Engineering, University of Michigan, Ann Arbor, MI, USA"],"raw_orcid":"https://orcid.org/0000-0001-6119-3182","affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, University of Michigan, Ann Arbor, MI, USA","institution_ids":["https://openalex.org/I27837315"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100460501","display_name":"Xiaowei Wang","orcid":"https://orcid.org/0000-0002-5883-7327"},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Xiaowei Wang","raw_affiliation_strings":["Department of Computer Science and Engineering, University of Michigan, Ann Arbor, MI, USA"],"raw_orcid":"https://orcid.org/0000-0002-5883-7327","affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, University of Michigan, Ann Arbor, MI, USA","institution_ids":["https://openalex.org/I27837315"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5085682261","display_name":"Charles Augustine","orcid":"https://orcid.org/0000-0001-8892-6286"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Charles Augustine","raw_affiliation_strings":["Circuit Research Labs, Intel Corporation, Hillsboro, OR, USA"],"raw_orcid":"https://orcid.org/0000-0001-8892-6286","affiliations":[{"raw_affiliation_string":"Circuit Research Labs, Intel Corporation, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102849990","display_name":"Ravishankar Iyer","orcid":"https://orcid.org/0000-0001-5383-9561"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I4210143979","display_name":"Systems Technology (United States)","ror":"https://ror.org/04cv8g472","country_code":"US","type":"company","lineage":["https://openalex.org/I4210143979"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ravishankar Iyer","raw_affiliation_strings":["Systems Technology Lab, Intel, Hillsboro, OR, USA"],"raw_orcid":"https://orcid.org/0000-0001-5383-9561","affiliations":[{"raw_affiliation_string":"Systems Technology Lab, Intel, Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700","https://openalex.org/I4210143979"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5027544576","display_name":"Reetuparna Das","orcid":"https://orcid.org/0000-0002-5894-8342"},"institutions":[{"id":"https://openalex.org/I27837315","display_name":"University of Michigan","ror":"https://ror.org/00jmfr291","country_code":"US","type":"education","lineage":["https://openalex.org/I27837315"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Reetuparna Das","raw_affiliation_strings":["Department of Computer Science and Engineering, University of Michigan, Ann Arbor, MI, USA"],"raw_orcid":"https://orcid.org/0000-0002-5894-8342","affiliations":[{"raw_affiliation_string":"Department of Computer Science and Engineering, University of Michigan, Ann Arbor, MI, USA","institution_ids":["https://openalex.org/I27837315"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.6705,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.64798281,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":98},"biblio":{"volume":"72","issue":"6","first_page":"1539","last_page":"1553"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7168649435043335},{"id":"https://openalex.org/keywords/application-specific-integrated-circuit","display_name":"Application-specific integrated circuit","score":0.58537757396698},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.5482594966888428},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5040437579154968},{"id":"https://openalex.org/keywords/artificial-neural-network","display_name":"Artificial neural network","score":0.50119948387146},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.49051111936569214},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.48840612173080444},{"id":"https://openalex.org/keywords/content-addressable-memory","display_name":"Content-addressable memory","score":0.42510756850242615},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.31804710626602173},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.3015434145927429}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7168649435043335},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.58537757396698},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.5482594966888428},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5040437579154968},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.50119948387146},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.49051111936569214},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.48840612173080444},{"id":"https://openalex.org/C53442348","wikidata":"https://www.wikidata.org/wiki/Q745101","display_name":"Content-addressable memory","level":3,"score":0.42510756850242615},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.31804710626602173},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.3015434145927429},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tc.2022.3214151","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.2022.3214151","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","0016-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.5299999713897705}],"awards":[{"id":"https://openalex.org/G4017362058","display_name":null,"funder_award_id":"1908601","funder_id":"https://openalex.org/F4320335353","funder_display_name":"National Science Foundation of Sri Lanka"},{"id":"https://openalex.org/G7782386450","display_name":null,"funder_award_id":"1652294","funder_id":"https://openalex.org/F4320335353","funder_display_name":"National Science Foundation of Sri Lanka"}],"funders":[{"id":"https://openalex.org/F4320333566","display_name":"National Defense Science and Engineering Graduate","ror":null},{"id":"https://openalex.org/F4320335353","display_name":"National Science Foundation of Sri Lanka","ror":"https://ror.org/010xaa060"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":50,"referenced_works":["https://openalex.org/W1591666071","https://openalex.org/W1598866093","https://openalex.org/W2075303777","https://openalex.org/W2331783522","https://openalex.org/W2606722458","https://openalex.org/W2613569094","https://openalex.org/W2613989746","https://openalex.org/W2770159745","https://openalex.org/W2789659455","https://openalex.org/W2801000640","https://openalex.org/W2883929540","https://openalex.org/W2884159178","https://openalex.org/W2899641901","https://openalex.org/W2922487710","https://openalex.org/W2930624726","https://openalex.org/W2932154853","https://openalex.org/W2950138172","https://openalex.org/W2980200167","https://openalex.org/W2986441544","https://openalex.org/W2992192853","https://openalex.org/W3012178976","https://openalex.org/W3015432327","https://openalex.org/W3015655039","https://openalex.org/W3016014942","https://openalex.org/W3016021860","https://openalex.org/W3016082253","https://openalex.org/W3016430712","https://openalex.org/W3036878841","https://openalex.org/W3042416028","https://openalex.org/W3042905487","https://openalex.org/W3048775232","https://openalex.org/W3094502228","https://openalex.org/W3103837983","https://openalex.org/W3125484574","https://openalex.org/W3133253223","https://openalex.org/W3133754064","https://openalex.org/W3134304371","https://openalex.org/W3134893068","https://openalex.org/W3135835558","https://openalex.org/W3185702163","https://openalex.org/W4244024631","https://openalex.org/W4280496502","https://openalex.org/W4280642915","https://openalex.org/W6635810480","https://openalex.org/W6769960585","https://openalex.org/W6771656455","https://openalex.org/W6776372927","https://openalex.org/W6784333009","https://openalex.org/W6791731405","https://openalex.org/W6791915121"],"related_works":["https://openalex.org/W3151633427","https://openalex.org/W2212894501","https://openalex.org/W2793465010","https://openalex.org/W3024050170","https://openalex.org/W4293253840","https://openalex.org/W4378977321","https://openalex.org/W2068933159","https://openalex.org/W2368609622","https://openalex.org/W2561621772","https://openalex.org/W2119025037"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"theEideticarchitecture,":[3],"which":[4],"is":[5],"an":[6],"SRAM-based":[7],"ASIC":[8],"neural":[9],"network":[10,82],"accelerator":[11],"that":[12],"eliminates":[13],"the":[14,25,38,72,89,97],"need":[15,26],"to":[16,27],"continuously":[17],"load":[18],"weights":[19,91],"from":[20],"off-chip,":[21],"while":[22],"also":[23,55],"minimizing":[24],"go":[28],"off":[29],"chip":[30],"for":[31,51,61],"intermediate":[32,93],"results.":[33],"Using":[34],"in-situ":[35],"arithmetic":[36],"in":[37,120,125],"SRAM":[39],"arrays,":[40],"this":[41,76],"architecture":[42],"can":[43,83],"supports":[44],"a":[45,81,117,129],"variety":[46],"of":[47,80,102],"precision":[48],"types":[49],"allowing":[50],"effective":[52],"inference.":[53],"We":[54,106],"present":[56],"different":[57],"data":[58],"mapping":[59],"policies":[60],"matrix-vector":[62],"based":[63],"networks":[64],"(RNN":[65],"and":[66,70,92,99,115,122],"MLP)":[67],"on":[68],"theEideticarchitecture":[69],"describe":[71],"tradeoffs":[73],"involved.":[74],"With":[75],"architecture,":[77],"multiple":[78],"layers":[79],"be":[84],"concurrently":[85],"mapped,":[86],"storing":[87],"both":[88],"layer":[90],"results":[94],"on-chip,":[95],"removing":[96],"energy":[98],"latency":[100,127],"penalty":[101],"off-chip":[103],"memory":[104],"accesses.":[105],"evaluateEideticon":[107],"Google's":[108],"Neural":[109],"Machine":[110],"Translation":[111],"System":[112],"(GNMT)":[113],"encoder":[114],"demonstrate":[116],"17.20\u00d7":[118],"increase":[119],"throughput":[121],"7.77\u00d7":[123],"reduction":[124],"average":[126],"over":[128],"single":[130],"TPUv2":[131],"chip.":[132]},"counts_by_year":[{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":3}],"updated_date":"2026-07-29T09:40:50.615796","created_date":"2025-10-10T00:00:00"}