{"id":"https://openalex.org/W2957881016","doi":"https://doi.org/10.1109/tc.2019.2923033","title":"<i>Guest Editorial: IEEE Transactions on Computers</i> Special Section on Emerging Non-Volatile Memory Technologies: From Devices to Architectures and Systems","display_name":"<i>Guest Editorial: IEEE Transactions on Computers</i> Special Section on Emerging Non-Volatile Memory Technologies: From Devices to Architectures and Systems","publication_year":2019,"publication_date":"2019-07-10","ids":{"openalex":"https://openalex.org/W2957881016","doi":"https://doi.org/10.1109/tc.2019.2923033","mag":"2957881016"},"language":"en","primary_location":{"id":"doi:10.1109/tc.2019.2923033","is_oa":true,"landing_page_url":"https://doi.org/10.1109/tc.2019.2923033","pdf_url":"https://ieeexplore.ieee.org/ielx7/12/8758258/08758259.pdf","source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","0016-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"bronze","oa_url":"https://ieeexplore.ieee.org/ielx7/12/8758258/08758259.pdf","any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5073534245","display_name":"Yuan-Hao Chang","orcid":"https://orcid.org/0000-0002-1282-2111"},"institutions":[{"id":"https://openalex.org/I4210098366","display_name":"Institute of Information Science, Academia Sinica","ror":"https://ror.org/00z83z196","country_code":"TW","type":"facility","lineage":["https://openalex.org/I4210098366","https://openalex.org/I84653119"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yuan-Hao Chang","raw_affiliation_strings":["Institute of Information Science at Academia Sinica, Taipei, Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of Information Science at Academia Sinica, Taipei, Taiwan","institution_ids":["https://openalex.org/I4210098366"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066534595","display_name":"Jingtong Hu","orcid":"https://orcid.org/0000-0003-4029-4034"},"institutions":[{"id":"https://openalex.org/I170201317","display_name":"University of Pittsburgh","ror":"https://ror.org/01an3r305","country_code":"US","type":"education","lineage":["https://openalex.org/I170201317"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jingtong Hu","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Pittsburgh, Pittsburgh, PA, USA","Department of Electrical and Computer Engineering, University of Pittsburgh, Pittsburgh, PA, USA,,"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Pittsburgh, Pittsburgh, PA, USA","institution_ids":["https://openalex.org/I170201317"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Pittsburgh, Pittsburgh, PA, USA,,","institution_ids":["https://openalex.org/I170201317"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064445713","display_name":"Mehdi B. Tahoori","orcid":"https://orcid.org/0000-0002-8829-5610"},"institutions":[{"id":"https://openalex.org/I102335020","display_name":"Karlsruhe Institute of Technology","ror":"https://ror.org/04t3en479","country_code":"DE","type":"education","lineage":["https://openalex.org/I102335020","https://openalex.org/I1305996414"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Mehdi B. Tahoori","raw_affiliation_strings":["Department of Computer Science, Karlsruhe Institute of Technology, Karlsruhe, Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Karlsruhe Institute of Technology, Karlsruhe, Germany","institution_ids":["https://openalex.org/I102335020"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5069017725","display_name":"Ronald F. DeMara","orcid":"https://orcid.org/0000-0001-6864-7255"},"institutions":[{"id":"https://openalex.org/I106165777","display_name":"University of Central Florida","ror":"https://ror.org/036nfer12","country_code":"US","type":"education","lineage":["https://openalex.org/I106165777"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ronald F. DeMara","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Central Florida, Orlando, FL, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Central Florida, Orlando, FL, USA","institution_ids":["https://openalex.org/I106165777"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.467,"has_fulltext":true,"cited_by_count":5,"citation_normalized_percentile":{"value":0.64132253,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"68","issue":"8","first_page":"1111","last_page":"1113"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9962000250816345,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7708735466003418},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.745841920375824},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5684532523155212},{"id":"https://openalex.org/keywords/computer-memory","display_name":"Computer memory","score":0.5391595363616943},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5288518667221069},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.5002999305725098},{"id":"https://openalex.org/keywords/non-volatile-random-access-memory","display_name":"Non-volatile random-access memory","score":0.49832892417907715},{"id":"https://openalex.org/keywords/abstraction","display_name":"Abstraction","score":0.48672011494636536},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.47986334562301636},{"id":"https://openalex.org/keywords/cache-only-memory-architecture","display_name":"Cache-only memory architecture","score":0.4341161847114563},{"id":"https://openalex.org/keywords/computer-data-storage","display_name":"Computer data storage","score":0.41222673654556274},{"id":"https://openalex.org/keywords/memory-refresh","display_name":"Memory refresh","score":0.34961384534835815},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.34283578395843506},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.30551862716674805}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7708735466003418},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.745841920375824},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5684532523155212},{"id":"https://openalex.org/C92855701","wikidata":"https://www.wikidata.org/wiki/Q5830907","display_name":"Computer memory","level":3,"score":0.5391595363616943},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5288518667221069},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.5002999305725098},{"id":"https://openalex.org/C34172316","wikidata":"https://www.wikidata.org/wiki/Q499024","display_name":"Non-volatile random-access memory","level":5,"score":0.49832892417907715},{"id":"https://openalex.org/C124304363","wikidata":"https://www.wikidata.org/wiki/Q673661","display_name":"Abstraction","level":2,"score":0.48672011494636536},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.47986334562301636},{"id":"https://openalex.org/C3720319","wikidata":"https://www.wikidata.org/wiki/Q5015937","display_name":"Cache-only memory architecture","level":5,"score":0.4341161847114563},{"id":"https://openalex.org/C194739806","wikidata":"https://www.wikidata.org/wiki/Q66221","display_name":"Computer data storage","level":2,"score":0.41222673654556274},{"id":"https://openalex.org/C87907426","wikidata":"https://www.wikidata.org/wiki/Q6815755","display_name":"Memory refresh","level":4,"score":0.34961384534835815},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.34283578395843506},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.30551862716674805},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tc.2019.2923033","is_oa":true,"landing_page_url":"https://doi.org/10.1109/tc.2019.2923033","pdf_url":"https://ieeexplore.ieee.org/ielx7/12/8758258/08758259.pdf","source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","0016-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"}],"best_oa_location":{"id":"doi:10.1109/tc.2019.2923033","is_oa":true,"landing_page_url":"https://doi.org/10.1109/tc.2019.2923033","pdf_url":"https://ieeexplore.ieee.org/ielx7/12/8758258/08758259.pdf","source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","0016-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.6600000262260437}],"awards":[],"funders":[],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W2957881016.pdf","grobid_xml":"https://content.openalex.org/works/W2957881016.grobid-xml"},"referenced_works_count":1,"referenced_works":["https://openalex.org/W2957881016"],"related_works":["https://openalex.org/W2898989424","https://openalex.org/W4293159259","https://openalex.org/W2484628155","https://openalex.org/W2087924605","https://openalex.org/W1697439211","https://openalex.org/W2493772236","https://openalex.org/W2086753460","https://openalex.org/W2519756347","https://openalex.org/W2917910015","https://openalex.org/W3091205277"],"abstract_inverted_index":{"The":[0,76],"papers":[1],"in":[2,20,35,99,129],"this":[3],"special":[4],"section":[5],"focus":[6],"on":[7,31],"emerging":[8,116,145],"non-volatile":[9],"memory":[10,32,47,52,60],"technologies":[11,15,81,118],"(NVM).":[12],"Emerging":[13],"NVM":[14,80,117,146],"have":[16,55],"attracted":[17],"significant":[18],"interest":[19],"recent":[21],"years":[22],"because":[23],"of":[24,79,97,104,123,137],"the":[25,36,44,92,121,144,163,166],"fast-growing":[26],"performance":[27],"and":[28,33,48,61,112,159],"capacity":[29],"demands":[30],"storage":[34,62],"big":[37],"data":[38],"era.":[39],"Well":[40],"known":[41],"examples":[42],"include":[43],"3D":[45],"XPoint":[46],"various":[49],"NVDIMM":[50],"hybrid":[51],"technologies.":[53],"They":[54],"shown":[56],"potential":[57],"towards":[58],"larger":[59],"capacities":[63],"with":[64],"nearly":[65],"zero":[66],"leakage":[67],"power,":[68],"while":[69],"extending":[70],"memory/":[71],"system":[72,113],"architecture":[73],"design":[74],"approaches.":[75],"unique":[77],"characteristics":[78],"not":[82],"only":[83],"introduce":[84],"new":[85],"opportunities,":[86],"but":[87],"simultaneously":[88],"create":[89],"challenges":[90],"to":[91,165],"designs":[93],"at":[94],"multiple":[95],"levels":[96],"abstraction":[98],"computer":[100],"systems,":[101],"including":[102],"those":[103],"device":[105],"management,":[106,109],"CPU":[107],"cache":[108],"memory/storage":[110],"architecture,":[111],"design.":[114],"Furthermore,":[115],"also":[119],"drive":[120],"development":[122],"techniques":[124],"which":[125],"perform":[126],"computing":[127],"operations":[128],"memory,":[130],"i.e.,":[131],"processing-in-memory":[132],"(PIM),":[133],"by":[134],"taking":[135],"advantage":[136],"crossbar-based":[138],"accelerators":[139],"using":[140],"NVMs.":[141],"Thus,":[142],"for":[143,153],"technologies,":[147],"there":[148],"is":[149],"an":[150],"urgent":[151],"need":[152],"technology":[154],"innovation,":[155],"modeling,":[156],"analysis,":[157],"design,":[158],"application,":[160],"ranging":[161],"from":[162],"device-level":[164],"system-level.":[167]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
