{"id":"https://openalex.org/W2966099395","doi":"https://doi.org/10.1109/tc.2019.2907238","title":"An ALU Protection Methodology for Soft Processors on SRAM-Based FPGAs","display_name":"An ALU Protection Methodology for Soft Processors on SRAM-Based FPGAs","publication_year":2019,"publication_date":"2019-03-25","ids":{"openalex":"https://openalex.org/W2966099395","doi":"https://doi.org/10.1109/tc.2019.2907238","mag":"2966099395"},"language":"en","primary_location":{"id":"doi:10.1109/tc.2019.2907238","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.2019.2907238","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5061075603","display_name":"Alexis Ramos","orcid":"https://orcid.org/0000-0003-2424-8679"},"institutions":[{"id":"https://openalex.org/I3020445194","display_name":"Universidad Nebrija","ror":"https://ror.org/03tzyrt94","country_code":"ES","type":"education","lineage":["https://openalex.org/I3020445194"]}],"countries":["ES"],"is_corresponding":true,"raw_author_name":"Alexis Ramos","raw_affiliation_strings":["ARIES Research Center, Escuela Polit\u00e9cnica Superior, Universidad Antonio de Nebrija, Pirineos 55, Madrid, Spain"],"raw_orcid":"https://orcid.org/0000-0003-2424-8679","affiliations":[{"raw_affiliation_string":"ARIES Research Center, Escuela Polit\u00e9cnica Superior, Universidad Antonio de Nebrija, Pirineos 55, Madrid, Spain","institution_ids":["https://openalex.org/I3020445194"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5113845379","display_name":"Ricardo G. Toral","orcid":null},"institutions":[{"id":"https://openalex.org/I32923980","display_name":"Xilinx (United States)","ror":"https://ror.org/01rb7bk56","country_code":"US","type":"company","lineage":["https://openalex.org/I32923980"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ricardo G. Toral","raw_affiliation_strings":["Xilinx, Edinburgh, Scotland"],"raw_orcid":"https://orcid.org/0000-0001-5792-0180","affiliations":[{"raw_affiliation_string":"Xilinx, Edinburgh, Scotland","institution_ids":["https://openalex.org/I32923980"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5080322790","display_name":"Pedro Reviriego","orcid":"https://orcid.org/0000-0003-2540-5234"},"institutions":[{"id":"https://openalex.org/I50357001","display_name":"Universidad Carlos III de Madrid","ror":"https://ror.org/03ths8210","country_code":"ES","type":"education","lineage":["https://openalex.org/I50357001"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Pedro Reviriego","raw_affiliation_strings":["Department of Telematics Engineering, Universidad Carlos III de Madrid, Leganes, Spain"],"raw_orcid":"https://orcid.org/0000-0003-2540-5234","affiliations":[{"raw_affiliation_string":"Department of Telematics Engineering, Universidad Carlos III de Madrid, Leganes, Spain","institution_ids":["https://openalex.org/I50357001"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5044495372","display_name":"Juan Antonio Maestro","orcid":"https://orcid.org/0000-0001-7133-9026"},"institutions":[{"id":"https://openalex.org/I3020445194","display_name":"Universidad Nebrija","ror":"https://ror.org/03tzyrt94","country_code":"ES","type":"education","lineage":["https://openalex.org/I3020445194"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Juan Antonio Maestro","raw_affiliation_strings":["ARIES Research Center, Escuela Polit\u00e9cnica Superior, Universidad Antonio de Nebrija, Pirineos 55, Madrid, Spain"],"raw_orcid":"https://orcid.org/0000-0001-7133-9026","affiliations":[{"raw_affiliation_string":"ARIES Research Center, Escuela Polit\u00e9cnica Superior, Universidad Antonio de Nebrija, Pirineos 55, Madrid, Spain","institution_ids":["https://openalex.org/I3020445194"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5061075603"],"corresponding_institution_ids":["https://openalex.org/I3020445194"],"apc_list":null,"apc_paid":null,"fwci":1.6949,"has_fulltext":false,"cited_by_count":34,"citation_normalized_percentile":{"value":0.84781284,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":96,"max":99},"biblio":{"volume":"68","issue":"9","first_page":"1404","last_page":"1410"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9916999936103821,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.989799976348877,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7514809370040894},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7401163578033447},{"id":"https://openalex.org/keywords/soft-error","display_name":"Soft error","score":0.6636902093887329},{"id":"https://openalex.org/keywords/fault-injection","display_name":"Fault injection","score":0.625645637512207},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6216384768486023},{"id":"https://openalex.org/keywords/triple-modular-redundancy","display_name":"Triple modular redundancy","score":0.6126077771186829},{"id":"https://openalex.org/keywords/arithmetic-logic-unit","display_name":"Arithmetic logic unit","score":0.5618443489074707},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.5145370364189148},{"id":"https://openalex.org/keywords/redundancy","display_name":"Redundancy (engineering)","score":0.4607279300689697},{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.4308618903160095},{"id":"https://openalex.org/keywords/microprocessor","display_name":"Microprocessor","score":0.4299928545951843},{"id":"https://openalex.org/keywords/lookup-table","display_name":"Lookup table","score":0.4204043745994568},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3142114281654358},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.14309540390968323},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.13030734658241272},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.10096269845962524},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.08817648887634277}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7514809370040894},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7401163578033447},{"id":"https://openalex.org/C154474529","wikidata":"https://www.wikidata.org/wiki/Q1658917","display_name":"Soft error","level":2,"score":0.6636902093887329},{"id":"https://openalex.org/C2775928411","wikidata":"https://www.wikidata.org/wiki/Q2041312","display_name":"Fault injection","level":3,"score":0.625645637512207},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6216384768486023},{"id":"https://openalex.org/C196371267","wikidata":"https://www.wikidata.org/wiki/Q3998979","display_name":"Triple modular redundancy","level":3,"score":0.6126077771186829},{"id":"https://openalex.org/C100276221","wikidata":"https://www.wikidata.org/wiki/Q192903","display_name":"Arithmetic logic unit","level":2,"score":0.5618443489074707},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.5145370364189148},{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.4607279300689697},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.4308618903160095},{"id":"https://openalex.org/C2780728072","wikidata":"https://www.wikidata.org/wiki/Q5297","display_name":"Microprocessor","level":2,"score":0.4299928545951843},{"id":"https://openalex.org/C134835016","wikidata":"https://www.wikidata.org/wiki/Q690265","display_name":"Lookup table","level":2,"score":0.4204043745994568},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3142114281654358},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.14309540390968323},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.13030734658241272},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.10096269845962524},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.08817648887634277}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tc.2019.2907238","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.2019.2907238","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":39,"referenced_works":["https://openalex.org/W1504339380","https://openalex.org/W1972649107","https://openalex.org/W1980073965","https://openalex.org/W1983394510","https://openalex.org/W1993436912","https://openalex.org/W2021708499","https://openalex.org/W2029938404","https://openalex.org/W2063207167","https://openalex.org/W2065502715","https://openalex.org/W2088559447","https://openalex.org/W2093412576","https://openalex.org/W2094268079","https://openalex.org/W2094809958","https://openalex.org/W2100644384","https://openalex.org/W2107244404","https://openalex.org/W2115722171","https://openalex.org/W2120185818","https://openalex.org/W2123596317","https://openalex.org/W2127178251","https://openalex.org/W2127871209","https://openalex.org/W2133024677","https://openalex.org/W2142682203","https://openalex.org/W2144512449","https://openalex.org/W2153224608","https://openalex.org/W2156250257","https://openalex.org/W2160557756","https://openalex.org/W2294537163","https://openalex.org/W2342204193","https://openalex.org/W2579283874","https://openalex.org/W2612154405","https://openalex.org/W2753954328","https://openalex.org/W2758721118","https://openalex.org/W2767057960","https://openalex.org/W3021274475","https://openalex.org/W4230392938","https://openalex.org/W4243597858","https://openalex.org/W4249144718","https://openalex.org/W6630010957","https://openalex.org/W6657798671"],"related_works":["https://openalex.org/W2078707653","https://openalex.org/W2768966772","https://openalex.org/W2102690581","https://openalex.org/W1491404489","https://openalex.org/W167580156","https://openalex.org/W3016958173","https://openalex.org/W2371841116","https://openalex.org/W2776397918","https://openalex.org/W2069484989","https://openalex.org/W2068711101"],"abstract_inverted_index":{"The":[0,144],"use":[1],"of":[2,16,36,43,47,85,94,102,114,141],"microprocessors":[3],"in":[4,34,78,150],"space":[5],"missions":[6],"implies":[7],"that":[8],"they":[9],"should":[10],"be":[11],"protected":[12],"against":[13,82],"the":[14,41,83,100,103,111,115,133],"effects":[15],"cosmic":[17],"radiation.":[18],"Commonly":[19],"this":[20,65,142],"objective":[21],"has":[22,147,159],"been":[23,148,160],"achieved":[24],"by":[25],"applying":[26],"modular":[27],"redundancy":[28],"techniques":[29,51],"which":[30],"provide":[31],"good":[32],"results":[33],"terms":[35],"reliability":[37,60],"but":[38],"increase":[39],"significantly":[40],"number":[42],"used":[44],"resources.":[45],"Because":[46],"that,":[48],"new":[49],"protection":[50,96,122],"have":[52],"appeared,":[53],"trying":[54],"to":[55,72,118,162],"establish":[56],"a":[57,74,92,151],"trade-off":[58],"between":[59],"and":[61],"resource":[62],"utilization.":[63],"In":[64],"paper,":[66],"we":[67],"propose":[68,127],"an":[69,79,120,139],"application-based":[70],"methodology,":[71],"protect":[73],"soft":[75,86,153],"processor":[76],"implemented":[77],"SRAM-based":[80],"FPGA,":[81,116],"effect":[84],"errors.":[87],"This":[88,105],"is":[89],"done":[90],"creating":[91],"library":[93],"adaptive":[95,121],"configurations,":[97],"based":[98],"on":[99],"profiling":[101],"application.":[104,125],"hardware":[106],"configuration":[107],"library,":[108],"combined":[109],"with":[110],"reprogramming":[112],"capabilities":[113],"helps":[117],"create":[119],"for":[123,132],"each":[124],"We":[126],"two":[128],"partial":[129],"TMR":[130],"configurations":[131],"Arithmetic":[134],"Logic":[135],"Unit":[136],"(ALU)":[137],"as":[138],"example":[140],"methodology.":[143],"proposed":[145],"scheme":[146],"tested":[149],"RISC-V":[152],"processor.":[154],"A":[155],"fault":[156],"injection":[157],"campaign":[158],"performed":[161],"test":[163],"its":[164],"reliability.":[165]},"counts_by_year":[{"year":2026,"cited_by_count":3},{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":7},{"year":2023,"cited_by_count":7},{"year":2022,"cited_by_count":7},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
