{"id":"https://openalex.org/W2884227506","doi":"https://doi.org/10.1109/tc.2018.2858251","title":"In-Memory Processing on the Spintronic CRAM: From Hardware Design to Application Mapping","display_name":"In-Memory Processing on the Spintronic CRAM: From Hardware Design to Application Mapping","publication_year":2018,"publication_date":"2018-07-20","ids":{"openalex":"https://openalex.org/W2884227506","doi":"https://doi.org/10.1109/tc.2018.2858251","mag":"2884227506"},"language":"en","primary_location":{"id":"doi:10.1109/tc.2018.2858251","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.2018.2858251","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5013347279","display_name":"Masoud Zabihi","orcid":"https://orcid.org/0000-0003-1916-901X"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Masoud Zabihi","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA"],"raw_orcid":"https://orcid.org/0000-0003-1916-901X","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I130238516"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5080806544","display_name":"Zamshed I. Chowdhury","orcid":"https://orcid.org/0000-0002-4096-7000"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Zamshed Iqbal Chowdhury","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA"],"raw_orcid":"https://orcid.org/0000-0002-4096-7000","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I130238516"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081856566","display_name":"Zhengyang Zhao","orcid":"https://orcid.org/0000-0002-8017-3635"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Zhengyang Zhao","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA"],"raw_orcid":"https://orcid.org/0000-0002-8017-3635","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I130238516"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018104631","display_name":"Ulya R. Karpuzcu","orcid":"https://orcid.org/0000-0001-9238-4256"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ulya R. Karpuzcu","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I130238516"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5062474441","display_name":"Jian\u2010Ping Wang","orcid":"https://orcid.org/0000-0003-2815-6624"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jian-Ping Wang","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I130238516"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5068714995","display_name":"Sachin S. Sapatnekar","orcid":"https://orcid.org/0000-0002-5353-2364"},"institutions":[{"id":"https://openalex.org/I130238516","display_name":"University of Minnesota","ror":"https://ror.org/017zqws13","country_code":"US","type":"education","lineage":["https://openalex.org/I130238516"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sachin S. Sapatnekar","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA"],"raw_orcid":"https://orcid.org/0000-0002-5353-2364","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN, USA","institution_ids":["https://openalex.org/I130238516"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":5.7613,"has_fulltext":false,"cited_by_count":109,"citation_normalized_percentile":{"value":0.96577159,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":96,"max":100},"biblio":{"volume":"68","issue":"8","first_page":"1159","last_page":"1173"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8013919591903687},{"id":"https://openalex.org/keywords/in-memory-processing","display_name":"In-Memory Processing","score":0.5400128960609436},{"id":"https://openalex.org/keywords/bottleneck","display_name":"Bottleneck","score":0.48077696561813354},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.47217077016830444},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.42770156264305115},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.42686256766319275},{"id":"https://openalex.org/keywords/noise-margin","display_name":"Noise margin","score":0.4195062816143036},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.41302022337913513},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3555047810077667},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3350435793399811},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3282431960105896},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.09720495343208313},{"id":"https://openalex.org/keywords/search-engine","display_name":"Search engine","score":0.096393883228302},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.09195470809936523}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8013919591903687},{"id":"https://openalex.org/C123593499","wikidata":"https://www.wikidata.org/wiki/Q6008583","display_name":"In-Memory Processing","level":5,"score":0.5400128960609436},{"id":"https://openalex.org/C2780513914","wikidata":"https://www.wikidata.org/wiki/Q18210350","display_name":"Bottleneck","level":2,"score":0.48077696561813354},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.47217077016830444},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.42770156264305115},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.42686256766319275},{"id":"https://openalex.org/C179499742","wikidata":"https://www.wikidata.org/wiki/Q1324892","display_name":"Noise margin","level":4,"score":0.4195062816143036},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.41302022337913513},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3555047810077667},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3350435793399811},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3282431960105896},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.09720495343208313},{"id":"https://openalex.org/C97854310","wikidata":"https://www.wikidata.org/wiki/Q19541","display_name":"Search engine","level":2,"score":0.096393883228302},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.09195470809936523},{"id":"https://openalex.org/C23123220","wikidata":"https://www.wikidata.org/wiki/Q816826","display_name":"Information retrieval","level":1,"score":0.0},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.0},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C164120249","wikidata":"https://www.wikidata.org/wiki/Q995982","display_name":"Web search query","level":3,"score":0.0},{"id":"https://openalex.org/C194222762","wikidata":"https://www.wikidata.org/wiki/Q114486","display_name":"Query by Example","level":4,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tc.2018.2858251","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.2018.2858251","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8399999737739563}],"awards":[],"funders":[{"id":"https://openalex.org/F4320331888","display_name":"Microelectronics Advanced Research Corporation","ror":"https://ror.org/047z4n946"},{"id":"https://openalex.org/F4320332180","display_name":"Defense Advanced Research Projects Agency","ror":"https://ror.org/02caytj08"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":49,"referenced_works":["https://openalex.org/W938103622","https://openalex.org/W1008565724","https://openalex.org/W1966058111","https://openalex.org/W1972841535","https://openalex.org/W1975237352","https://openalex.org/W1980446076","https://openalex.org/W1981220134","https://openalex.org/W1999085092","https://openalex.org/W2010202670","https://openalex.org/W2020106528","https://openalex.org/W2024122052","https://openalex.org/W2026578838","https://openalex.org/W2058490651","https://openalex.org/W2060969833","https://openalex.org/W2075278406","https://openalex.org/W2086112773","https://openalex.org/W2088797290","https://openalex.org/W2093524602","https://openalex.org/W2094332102","https://openalex.org/W2100824606","https://openalex.org/W2112980698","https://openalex.org/W2114440330","https://openalex.org/W2130034571","https://openalex.org/W2141762303","https://openalex.org/W2143782233","https://openalex.org/W2147570207","https://openalex.org/W2170879098","https://openalex.org/W2331783522","https://openalex.org/W2396622873","https://openalex.org/W2407339173","https://openalex.org/W2464177207","https://openalex.org/W2474451066","https://openalex.org/W2482064265","https://openalex.org/W2497599918","https://openalex.org/W2574134800","https://openalex.org/W2615320339","https://openalex.org/W2626772346","https://openalex.org/W2741948058","https://openalex.org/W2756167909","https://openalex.org/W2766489088","https://openalex.org/W2768145587","https://openalex.org/W3103973606","https://openalex.org/W3146874818","https://openalex.org/W4236485791","https://openalex.org/W4243585432","https://openalex.org/W4244607449","https://openalex.org/W6602586656","https://openalex.org/W6719768283","https://openalex.org/W6746078261"],"related_works":["https://openalex.org/W2505369450","https://openalex.org/W2315140189","https://openalex.org/W248835169","https://openalex.org/W4234756210","https://openalex.org/W2012997595","https://openalex.org/W1977963439","https://openalex.org/W2069344153","https://openalex.org/W2083861765","https://openalex.org/W2469797321","https://openalex.org/W2024190459"],"abstract_inverted_index":{"The":[0,143],"Computational":[1],"Random":[2],"Access":[3],"Memory":[4],"(CRAM)":[5],"is":[6,148],"a":[7,11,15,30,52,57,138,169],"platform":[8,34],"that":[9,35,47,116],"makes":[10],"small":[12],"modification":[13],"to":[14,20,51,110,179,184,191,197],"standard":[16],"spintronics-based":[17],"memory":[18,41,65,187],"array":[19,115],"organically":[21],"enable":[22],"logic":[23,106],"operations":[24,107,112,120],"within":[25,39],"the":[26,40,61,64,71,83,114,146,165,180,186,198],"array.":[27,66],"CRAM":[28,72,147,183],"provides":[29],"true":[31],"in-memory":[32],"computational":[33,49],"can":[36,74,176],"perform":[37],"computations":[38],"array,":[42],"as":[43,122],"against":[44],"other":[45],"methods":[46,127],"send":[48],"tasks":[50],"separate":[53],"processor":[54],"module":[55,59],"or":[56],"near-memory":[58,170],"at":[60,82],"periphery":[62],"of":[63,145,182,195],"This":[67],"paper":[68],"describes":[69],"how":[70],"structure":[73],"be":[75,177],"built":[76],"and":[77,86,100,124,137,152,161,175,190],"utilized,":[78],"accounting":[79,97],"for":[80,90,98,164],"considerations":[81],"device,":[84],"gate,":[85],"functional":[87],"levels.":[88],"Techniques":[89],"constructing":[91],"fundamental":[92],"gates":[93],"are":[94,108,128,173],"first":[95],"overviewed,":[96],"electrical":[99],"noise":[101],"margin":[102],"considerations.":[103],"Next,":[104],"these":[105],"composed":[109],"schedule":[111],"in":[113,159],"implement":[117],"basic":[118],"arithmetic":[119],"such":[121],"addition":[123],"multiplication.":[125],"These":[126],"then":[129],"demonstrated":[130],"on":[131,150],"2D":[132],"convolution":[133],"with":[134],"multibit":[135],"data,":[136],"binary":[139],"neural":[140],"inference":[141],"engine.":[142],"performance":[144],"analyzed":[149],"near-term":[151],"longer-term":[153],"spintronic":[154],"device":[155],"technologies.":[156],"Significant":[157],"improvements":[158],"energy":[160],"execution":[162],"time":[163],"CRAM-based":[166],"implementation":[167],"over":[168],"processing":[171],"system":[172],"demonstrated,":[174],"attributed":[178],"ability":[181],"overcome":[185],"access":[188],"bottleneck,":[189],"provide":[192],"high":[193],"levels":[194],"parallelism":[196],"computation.":[199]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":9},{"year":2024,"cited_by_count":15},{"year":2023,"cited_by_count":17},{"year":2022,"cited_by_count":22},{"year":2021,"cited_by_count":11},{"year":2020,"cited_by_count":20},{"year":2019,"cited_by_count":10},{"year":2018,"cited_by_count":3}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
