{"id":"https://openalex.org/W2790447789","doi":"https://doi.org/10.1109/tc.2018.2807431","title":"Towards Formal Evaluation and Verification of Probabilistic Design","display_name":"Towards Formal Evaluation and Verification of Probabilistic Design","publication_year":2018,"publication_date":"2018-02-26","ids":{"openalex":"https://openalex.org/W2790447789","doi":"https://doi.org/10.1109/tc.2018.2807431","mag":"2790447789"},"language":"en","primary_location":{"id":"doi:10.1109/tc.2018.2807431","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.2018.2807431","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","0016-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5082879651","display_name":"Nian-Ze Lee","orcid":"https://orcid.org/0000-0002-8096-5595"},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Nian-Ze Lee","raw_affiliation_strings":["Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan"],"raw_orcid":"https://orcid.org/0000-0002-8096-5595","affiliations":[{"raw_affiliation_string":"Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5078604015","display_name":"Jie-Hong R. Jiang","orcid":"https://orcid.org/0000-0002-2279-4732"},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Jie-Hong R. Jiang","raw_affiliation_strings":["Department of Electrical Engineering and the Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan"],"raw_orcid":"https://orcid.org/0000-0002-2279-4732","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and the Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I16733864"],"apc_list":null,"apc_paid":null,"fwci":1.4281,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.83469253,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":"67","issue":"8","first_page":"1202","last_page":"1216"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7931866645812988},{"id":"https://openalex.org/keywords/probabilistic-logic","display_name":"Probabilistic logic","score":0.7890453338623047},{"id":"https://openalex.org/keywords/formal-verification","display_name":"Formal verification","score":0.5225531458854675},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.5154543519020081},{"id":"https://openalex.org/keywords/solver","display_name":"Solver","score":0.5106325745582581},{"id":"https://openalex.org/keywords/binary-decision-diagram","display_name":"Binary decision diagram","score":0.5019693374633789},{"id":"https://openalex.org/keywords/boolean-satisfiability-problem","display_name":"Boolean satisfiability problem","score":0.4885214567184448},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.46861395239830017},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.42552223801612854},{"id":"https://openalex.org/keywords/probabilistic-design","display_name":"Probabilistic design","score":0.4169941842556},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.4145490825176239},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3661695420742035},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.34702521562576294},{"id":"https://openalex.org/keywords/engineering-design-process","display_name":"Engineering design process","score":0.16176223754882812},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.1270785629749298},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.12396052479743958},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.11789226531982422}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7931866645812988},{"id":"https://openalex.org/C49937458","wikidata":"https://www.wikidata.org/wiki/Q2599292","display_name":"Probabilistic logic","level":2,"score":0.7890453338623047},{"id":"https://openalex.org/C111498074","wikidata":"https://www.wikidata.org/wiki/Q173326","display_name":"Formal verification","level":2,"score":0.5225531458854675},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.5154543519020081},{"id":"https://openalex.org/C2778770139","wikidata":"https://www.wikidata.org/wiki/Q1966904","display_name":"Solver","level":2,"score":0.5106325745582581},{"id":"https://openalex.org/C3309909","wikidata":"https://www.wikidata.org/wiki/Q864155","display_name":"Binary decision diagram","level":2,"score":0.5019693374633789},{"id":"https://openalex.org/C6943359","wikidata":"https://www.wikidata.org/wiki/Q875276","display_name":"Boolean satisfiability problem","level":2,"score":0.4885214567184448},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.46861395239830017},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.42552223801612854},{"id":"https://openalex.org/C154205457","wikidata":"https://www.wikidata.org/wiki/Q2148377","display_name":"Probabilistic design","level":3,"score":0.4169941842556},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.4145490825176239},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3661695420742035},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.34702521562576294},{"id":"https://openalex.org/C34972735","wikidata":"https://www.wikidata.org/wiki/Q2920267","display_name":"Engineering design process","level":2,"score":0.16176223754882812},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.1270785629749298},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.12396052479743958},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.11789226531982422},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tc.2018.2807431","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.2018.2807431","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","0016-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G1432814051","display_name":"Variability-Aware Scalable Synthesis and Analysis Methods for Sub-10 nanometer Technologies (I)","funder_award_id":"MOST103-2221-E002-273","funder_id":"https://openalex.org/F4320322795","funder_display_name":"Ministry of Science and Technology, Taiwan"},{"id":"https://openalex.org/G4135118188","display_name":"Biopsy: Biochemical Programming System","funder_award_id":"MOST106-2923-E002-002-MY3","funder_id":"https://openalex.org/F4320322795","funder_display_name":"Ministry of Science and Technology, Taiwan"},{"id":"https://openalex.org/G7736942187","display_name":"Synthesis and Verification for Emerging Systems","funder_award_id":"MOST104-2628-E002-013-MY3","funder_id":"https://openalex.org/F4320322795","funder_display_name":"Ministry of Science and Technology, Taiwan"},{"id":"https://openalex.org/G8044954655","display_name":"Advanced Logic Synthesis Techniques for Next-Generation Electronic Design Automation","funder_award_id":"MOST105-2221-E002-196-MY3","funder_id":"https://openalex.org/F4320322795","funder_display_name":"Ministry of Science and Technology, Taiwan"}],"funders":[{"id":"https://openalex.org/F4320322795","display_name":"Ministry of Science and Technology, Taiwan","ror":"https://ror.org/02kv4zf79"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":54,"referenced_works":["https://openalex.org/W66292180","https://openalex.org/W91128990","https://openalex.org/W179198942","https://openalex.org/W189719929","https://openalex.org/W1495732641","https://openalex.org/W1552780167","https://openalex.org/W1576973534","https://openalex.org/W1612810659","https://openalex.org/W1758913682","https://openalex.org/W1819209966","https://openalex.org/W1975656821","https://openalex.org/W1996431812","https://openalex.org/W2017521824","https://openalex.org/W2044811285","https://openalex.org/W2045294186","https://openalex.org/W2054726834","https://openalex.org/W2057361103","https://openalex.org/W2063203247","https://openalex.org/W2068829386","https://openalex.org/W2077476995","https://openalex.org/W2082738287","https://openalex.org/W2096198922","https://openalex.org/W2096424065","https://openalex.org/W2104122494","https://openalex.org/W2106672998","https://openalex.org/W2112710730","https://openalex.org/W2112767336","https://openalex.org/W2119530531","https://openalex.org/W2136052666","https://openalex.org/W2144038574","https://openalex.org/W2145344405","https://openalex.org/W2180580882","https://openalex.org/W2533121491","https://openalex.org/W2535375934","https://openalex.org/W2731393059","https://openalex.org/W3146960355","https://openalex.org/W3203992401","https://openalex.org/W4231091214","https://openalex.org/W4232479396","https://openalex.org/W4233114350","https://openalex.org/W4233797461","https://openalex.org/W4234974086","https://openalex.org/W4240268885","https://openalex.org/W4245558464","https://openalex.org/W4245630182","https://openalex.org/W4249427977","https://openalex.org/W4301208911","https://openalex.org/W6603686475","https://openalex.org/W6607267866","https://openalex.org/W6607701225","https://openalex.org/W6633055579","https://openalex.org/W6634501213","https://openalex.org/W6636505876","https://openalex.org/W6656594533"],"related_works":["https://openalex.org/W4300631294","https://openalex.org/W2390183607","https://openalex.org/W2348129335","https://openalex.org/W2041221011","https://openalex.org/W2122355433","https://openalex.org/W2139907818","https://openalex.org/W2539907235","https://openalex.org/W2158533859","https://openalex.org/W1995935127","https://openalex.org/W199857292"],"abstract_inverted_index":{"In":[0],"the":[1,14,64,109,122,134,154],"nanometer":[2],"regime":[3],"of":[4,18,25,68,113,159,177],"integrated":[5],"circuit":[6],"fabrication,":[7],"device":[8],"variability":[9],"imposes":[10],"serious":[11],"challenges":[12],"to":[13,34,75,107,138],"design":[15,29,36,52],"and":[16,27,66,83,100,111,164],"manufacturing":[17],"reliable":[19],"systems.":[20],"A":[21],"new":[22],"computation":[23],"paradigm":[24],"approximate":[26,49],"probabilistic":[28,51,69,84,178],"has":[30],"been":[31],"proposed":[32,117],"recently":[33],"accept":[35],"imperfection":[37],"as":[38],"a":[39,60,88,101,139],"resource":[40],"for":[41,63],"certain":[42],"applications.":[43],"Despite":[44],"recent":[45],"intensive":[46],"study":[47,104],"on":[48,93,143],"design,":[50],"receives":[53],"relatively":[54],"few":[55],"attentions.":[56],"This":[57],"paper":[58],"provides":[59],"general":[61],"formulation":[62],"evaluation":[65],"verification":[67],"design.":[70,179],"We":[71,131],"establish":[72],"their":[73],"connection":[74],"stochastic":[76],"Boolean":[77],"satisfiability":[78],"(SSAT),":[79],"(weighted)":[80],"model":[81,85],"counting,":[82],"checking.":[86],"Moreover,":[87],"novel":[89],"SSAT":[90,119,136],"solver":[91,120,137],"based":[92,142],"binary":[94],"decision":[95],"diagram":[96],"(BDD)":[97],"is":[98,105],"proposed,":[99],"comparative":[102],"experimental":[103],"performed":[106],"contrast":[108],"strengths":[110],"weaknesses":[112],"different":[114],"solutions.":[115],"The":[116],"BDD-based":[118,135],"obtains":[121],"best":[123],"scalability":[124],"among":[125],"all":[126],"techniques":[127],"in":[128,161],"our":[129,151],"experiments.":[130],"also":[132],"compare":[133],"prior":[140,155],"method":[141,152,156],"Bayesian":[144],"network":[145],"modeling.":[146],"Experimental":[147],"results":[148],"show":[149],"that":[150],"outperforms":[153],"by":[157],"orders":[158],"magnitude":[160],"both":[162],"runtime":[163],"memory":[165],"usage.":[166],"Our":[167],"work":[168],"can":[169],"be":[170],"an":[171],"essential":[172],"step":[173],"towards":[174],"automated":[175],"synthesis":[176]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":5},{"year":2021,"cited_by_count":5},{"year":2019,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2026-08-06T08:24:18.245995","created_date":"2025-10-10T00:00:00"}
