{"id":"https://openalex.org/W2626303320","doi":"https://doi.org/10.1109/tc.2017.2716355","title":"Efficient Multibyte Floating Point Data Formats Using Vectorization","display_name":"Efficient Multibyte Floating Point Data Formats Using Vectorization","publication_year":2017,"publication_date":"2017-06-16","ids":{"openalex":"https://openalex.org/W2626303320","doi":"https://doi.org/10.1109/tc.2017.2716355","mag":"2626303320"},"language":"en","primary_location":{"id":"doi:10.1109/tc.2017.2716355","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.2017.2716355","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5010687192","display_name":"Andrew Anderson","orcid":"https://orcid.org/0000-0002-4357-4739"},"institutions":[{"id":"https://openalex.org/I205274468","display_name":"Trinity College Dublin","ror":"https://ror.org/02tyrky19","country_code":"IE","type":"education","lineage":["https://openalex.org/I205274468"]}],"countries":["IE"],"is_corresponding":true,"raw_author_name":"Andrew Anderson","raw_affiliation_strings":["Lero, Trinity College Dublin, Dublin 2, Ireland"],"affiliations":[{"raw_affiliation_string":"Lero, Trinity College Dublin, Dublin 2, Ireland","institution_ids":["https://openalex.org/I205274468"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043250051","display_name":"Servesh Muralidharan","orcid":"https://orcid.org/0000-0002-3541-5658"},"institutions":[{"id":"https://openalex.org/I131781684","display_name":"Intel (Ireland)","ror":"https://ror.org/02r5scg33","country_code":"IE","type":"company","lineage":["https://openalex.org/I131781684","https://openalex.org/I1343180700"]},{"id":"https://openalex.org/I2802744477","display_name":"Irish Centre for High-End Computing","ror":"https://ror.org/04te6a418","country_code":"IE","type":"funder","lineage":["https://openalex.org/I2802744477"]}],"countries":["IE"],"is_corresponding":false,"raw_author_name":"Servesh Muralidharan","raw_affiliation_strings":["Irish Centre for High-End Computing, Intel Parallel Computing Center, Dublin 2, Ireland"],"affiliations":[{"raw_affiliation_string":"Irish Centre for High-End Computing, Intel Parallel Computing Center, Dublin 2, Ireland","institution_ids":["https://openalex.org/I2802744477","https://openalex.org/I131781684"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5003800161","display_name":"David Gregg","orcid":"https://orcid.org/0000-0003-3782-4612"},"institutions":[{"id":"https://openalex.org/I205274468","display_name":"Trinity College Dublin","ror":"https://ror.org/02tyrky19","country_code":"IE","type":"education","lineage":["https://openalex.org/I205274468"]}],"countries":["IE"],"is_corresponding":false,"raw_author_name":"David Gregg","raw_affiliation_strings":["Lero, Trinity College Dublin, Dublin 2, Ireland"],"affiliations":[{"raw_affiliation_string":"Lero, Trinity College Dublin, Dublin 2, Ireland","institution_ids":["https://openalex.org/I205274468"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5010687192"],"corresponding_institution_ids":["https://openalex.org/I205274468"],"apc_list":null,"apc_paid":null,"fwci":0.4738,"has_fulltext":false,"cited_by_count":14,"citation_normalized_percentile":{"value":0.66051805,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"66","issue":"12","first_page":"2081","last_page":"2096"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11697","display_name":"Numerical Methods and Algorithms","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9954000115394592,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8209530115127563},{"id":"https://openalex.org/keywords/floating-point","display_name":"Floating point","score":0.7964644432067871},{"id":"https://openalex.org/keywords/vectorization","display_name":"Vectorization (mathematics)","score":0.7531791925430298},{"id":"https://openalex.org/keywords/xeon-phi","display_name":"Xeon Phi","score":0.7517125606536865},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6757127642631531},{"id":"https://openalex.org/keywords/double-precision-floating-point-format","display_name":"Double-precision floating-point format","score":0.6498813629150391},{"id":"https://openalex.org/keywords/byte","display_name":"Byte","score":0.5709355473518372},{"id":"https://openalex.org/keywords/single-precision-floating-point-format","display_name":"Single-precision floating-point format","score":0.5392910242080688},{"id":"https://openalex.org/keywords/xeon","display_name":"Xeon","score":0.5160245895385742},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.5013558864593506},{"id":"https://openalex.org/keywords/simd","display_name":"SIMD","score":0.4971201717853546},{"id":"https://openalex.org/keywords/vector-processor","display_name":"Vector processor","score":0.4661622643470764},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4526505172252655},{"id":"https://openalex.org/keywords/point","display_name":"Point (geometry)","score":0.42515790462493896},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.24549463391304016},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.0951184332370758}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8209530115127563},{"id":"https://openalex.org/C84211073","wikidata":"https://www.wikidata.org/wiki/Q117879","display_name":"Floating point","level":2,"score":0.7964644432067871},{"id":"https://openalex.org/C41681595","wikidata":"https://www.wikidata.org/wiki/Q7917855","display_name":"Vectorization (mathematics)","level":2,"score":0.7531791925430298},{"id":"https://openalex.org/C96972482","wikidata":"https://www.wikidata.org/wiki/Q1049168","display_name":"Xeon Phi","level":2,"score":0.7517125606536865},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6757127642631531},{"id":"https://openalex.org/C35912277","wikidata":"https://www.wikidata.org/wiki/Q1243369","display_name":"Double-precision floating-point format","level":3,"score":0.6498813629150391},{"id":"https://openalex.org/C43364308","wikidata":"https://www.wikidata.org/wiki/Q8799","display_name":"Byte","level":2,"score":0.5709355473518372},{"id":"https://openalex.org/C133095886","wikidata":"https://www.wikidata.org/wiki/Q1307173","display_name":"Single-precision floating-point format","level":3,"score":0.5392910242080688},{"id":"https://openalex.org/C145108525","wikidata":"https://www.wikidata.org/wiki/Q656154","display_name":"Xeon","level":2,"score":0.5160245895385742},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.5013558864593506},{"id":"https://openalex.org/C150552126","wikidata":"https://www.wikidata.org/wiki/Q339387","display_name":"SIMD","level":2,"score":0.4971201717853546},{"id":"https://openalex.org/C161824985","wikidata":"https://www.wikidata.org/wiki/Q919509","display_name":"Vector processor","level":2,"score":0.4661622643470764},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4526505172252655},{"id":"https://openalex.org/C28719098","wikidata":"https://www.wikidata.org/wiki/Q44946","display_name":"Point (geometry)","level":2,"score":0.42515790462493896},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.24549463391304016},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0951184332370758},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tc.2017.2716355","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.2017.2716355","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G7736775806","display_name":null,"funder_award_id":"13/RC/2094","funder_id":"https://openalex.org/F4320320847","funder_display_name":"Science Foundation Ireland"}],"funders":[{"id":"https://openalex.org/F4320320847","display_name":"Science Foundation Ireland","ror":"https://ror.org/0271asj38"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W605824955","https://openalex.org/W1560908187","https://openalex.org/W1981812667","https://openalex.org/W1985856855","https://openalex.org/W2034572143","https://openalex.org/W2037102844","https://openalex.org/W2037724609","https://openalex.org/W2049548876","https://openalex.org/W2065360261","https://openalex.org/W2068710519","https://openalex.org/W2081368694","https://openalex.org/W2101319758","https://openalex.org/W2121344286","https://openalex.org/W2159211021","https://openalex.org/W2170588811","https://openalex.org/W2207050309","https://openalex.org/W2257139249","https://openalex.org/W2292182532","https://openalex.org/W2340076492","https://openalex.org/W2399231647","https://openalex.org/W2560148612","https://openalex.org/W2610467942","https://openalex.org/W2739677251","https://openalex.org/W3015537608","https://openalex.org/W4245521866","https://openalex.org/W6712727860","https://openalex.org/W6742111588"],"related_works":["https://openalex.org/W3150370983","https://openalex.org/W2239119680","https://openalex.org/W2739740241","https://openalex.org/W1974923383","https://openalex.org/W3022016791","https://openalex.org/W2612377115","https://openalex.org/W4214765606","https://openalex.org/W1953299766","https://openalex.org/W2494722835","https://openalex.org/W2265064666"],"abstract_inverted_index":{"We":[0,39],"propose":[1],"a":[2,12,29,67,87],"scheme":[3,20,43,109],"for":[4,28],"reduced-precision":[5],"representation":[6],"of":[7,24],"floating":[8,16,91,115],"point":[9,17,92,116],"data":[10,36],"on":[11,52,66],"continuum":[13],"between":[14],"IEEE-754":[15],"types.":[18],"Our":[19,73],"enables":[21],"the":[22,119],"use":[23],"lower":[25],"precision":[26,79],"formats":[27],"reduction":[30],"in":[31],"storage":[32],"space":[33],"requirements":[34],"and":[35,61],"transfer":[37],"volume.":[38],"describe":[40],"how":[41],"our":[42,102,108],"can":[44,85],"be":[45],"accelerated":[46],"using":[47],"existing":[48],"hardware":[49,99],"vector":[50,83,121],"units":[51],"two":[53],"general-purpose":[54],"processor":[55],"(GPP)":[56],"microarchitectures":[57],"(Intel":[58,70],"Ivy":[59],"Bridge":[60],"Haswell),":[62],"as":[63,65],"well":[64],"numerical":[68],"accelerator":[69],"Xeon":[71],"Phi).":[72],"evaluation":[74],"demonstrates":[75],"that":[76,94],"supporting":[77],"reduced":[78],"by":[80],"exploiting":[81],"native":[82,114],"instructions":[84],"yield":[86],"low":[88],"overhead":[89],"custom-precision":[90],"solution":[93],"does":[95],"not":[96],"require":[97],"specialized":[98],"support.":[100],"In":[101],"experiments":[103],"we":[104],"find":[105],"cases":[106],"where":[107,118],"is":[110],"actually":[111],"faster":[112],"than":[113],"types":[117],"underlying":[120],"instruction":[122],"set":[123],"supports":[124],"efficient":[125],"byte-level":[126],"permutations.":[127]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":2},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":2},{"year":2012,"cited_by_count":1}],"updated_date":"2026-03-20T23:20:44.827607","created_date":"2025-10-10T00:00:00"}
