{"id":"https://openalex.org/W2344607722","doi":"https://doi.org/10.1109/tc.2015.2500572","title":"Global Real-Time Memory-Centric Scheduling for Multicore Systems","display_name":"Global Real-Time Memory-Centric Scheduling for Multicore Systems","publication_year":2015,"publication_date":"2015-11-13","ids":{"openalex":"https://openalex.org/W2344607722","doi":"https://doi.org/10.1109/tc.2015.2500572","mag":"2344607722"},"language":"en","primary_location":{"id":"doi:10.1109/tc.2015.2500572","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.2015.2500572","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5012553368","display_name":"Gang Yao","orcid":"https://orcid.org/0000-0002-0466-8484"},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Gang Yao","raw_affiliation_strings":["Department of Computer Science, University of Illinois at Urbana-Champaign, Urbana, IL"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, University of Illinois at Urbana-Champaign, Urbana, IL","institution_ids":["https://openalex.org/I157725225"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5009578055","display_name":"Rodolfo Pellizzoni","orcid":"https://orcid.org/0000-0002-7331-804X"},"institutions":[{"id":"https://openalex.org/I151746483","display_name":"University of Waterloo","ror":"https://ror.org/01aff2v68","country_code":"CA","type":"education","lineage":["https://openalex.org/I151746483"]}],"countries":["CA"],"is_corresponding":false,"raw_author_name":"Rodolfo Pellizzoni","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, ON, Canada"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, ON, Canada","institution_ids":["https://openalex.org/I151746483"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033330108","display_name":"Stanley Bak","orcid":"https://orcid.org/0000-0003-4947-9553"},"institutions":[{"id":"https://openalex.org/I1280414376","display_name":"United States Air Force Research Laboratory","ror":"https://ror.org/02e2egq70","country_code":"US","type":"facility","lineage":["https://openalex.org/I1280414376","https://openalex.org/I1330347796","https://openalex.org/I4210102105","https://openalex.org/I4389425425"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Stanley Bak","raw_affiliation_strings":["United States Air Force Research Lab, Rome, NY"],"affiliations":[{"raw_affiliation_string":"United States Air Force Research Lab, Rome, NY","institution_ids":["https://openalex.org/I1280414376"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064659321","display_name":"Heechul Yun","orcid":"https://orcid.org/0000-0002-8515-2622"},"institutions":[{"id":"https://openalex.org/I146416000","display_name":"University of Kansas","ror":"https://ror.org/001tmjg57","country_code":"US","type":"education","lineage":["https://openalex.org/I146416000"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Heechul Yun","raw_affiliation_strings":["Department of Electrical Engineering and Computer Science, University of Kansas, Lawrence, KS"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering and Computer Science, University of Kansas, Lawrence, KS","institution_ids":["https://openalex.org/I146416000"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5060442004","display_name":"Marco Caccamo","orcid":"https://orcid.org/0000-0003-2328-044X"},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Marco Caccamo","raw_affiliation_strings":["Department of Computer Science, University of Illinois at Urbana-Champaign, Urbana, IL"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, University of Illinois at Urbana-Champaign, Urbana, IL","institution_ids":["https://openalex.org/I157725225"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5012553368"],"corresponding_institution_ids":["https://openalex.org/I157725225"],"apc_list":null,"apc_paid":null,"fwci":4.6176,"has_fulltext":false,"cited_by_count":50,"citation_normalized_percentile":{"value":0.95077295,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":91,"max":99},"biblio":{"volume":"65","issue":"9","first_page":"2739","last_page":"2751"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.9706000089645386,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9703999757766724,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8626575469970703},{"id":"https://openalex.org/keywords/uniform-memory-access","display_name":"Uniform memory access","score":0.6509401798248291},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5585529804229736},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.5187949538230896},{"id":"https://openalex.org/keywords/non-uniform-memory-access","display_name":"Non-uniform memory access","score":0.49375542998313904},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.4889287054538727},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.4790298044681549},{"id":"https://openalex.org/keywords/flat-memory-model","display_name":"Flat memory model","score":0.466081827878952},{"id":"https://openalex.org/keywords/cache-only-memory-architecture","display_name":"Cache-only memory architecture","score":0.46366575360298157},{"id":"https://openalex.org/keywords/worst-case-execution-time","display_name":"Worst-case execution time","score":0.44695883989334106},{"id":"https://openalex.org/keywords/shared-memory","display_name":"Shared memory","score":0.4426466226577759},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.4363250732421875},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.43524083495140076},{"id":"https://openalex.org/keywords/distributed-memory","display_name":"Distributed memory","score":0.43157297372817993},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.3625679910182953},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.2883857190608978},{"id":"https://openalex.org/keywords/cache-coloring","display_name":"Cache coloring","score":0.2062855064868927},{"id":"https://openalex.org/keywords/execution-time","display_name":"Execution time","score":0.1871548593044281},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.14530912041664124},{"id":"https://openalex.org/keywords/overlay","display_name":"Overlay","score":0.13783752918243408}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8626575469970703},{"id":"https://openalex.org/C51290061","wikidata":"https://www.wikidata.org/wiki/Q1936765","display_name":"Uniform memory access","level":4,"score":0.6509401798248291},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5585529804229736},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.5187949538230896},{"id":"https://openalex.org/C133371097","wikidata":"https://www.wikidata.org/wiki/Q868014","display_name":"Non-uniform memory access","level":5,"score":0.49375542998313904},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.4889287054538727},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.4790298044681549},{"id":"https://openalex.org/C57863822","wikidata":"https://www.wikidata.org/wiki/Q905488","display_name":"Flat memory model","level":4,"score":0.466081827878952},{"id":"https://openalex.org/C3720319","wikidata":"https://www.wikidata.org/wiki/Q5015937","display_name":"Cache-only memory architecture","level":5,"score":0.46366575360298157},{"id":"https://openalex.org/C200130814","wikidata":"https://www.wikidata.org/wiki/Q362858","display_name":"Worst-case execution time","level":3,"score":0.44695883989334106},{"id":"https://openalex.org/C133875982","wikidata":"https://www.wikidata.org/wiki/Q764810","display_name":"Shared memory","level":2,"score":0.4426466226577759},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.4363250732421875},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.43524083495140076},{"id":"https://openalex.org/C91481028","wikidata":"https://www.wikidata.org/wiki/Q1054686","display_name":"Distributed memory","level":3,"score":0.43157297372817993},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.3625679910182953},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.2883857190608978},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.2062855064868927},{"id":"https://openalex.org/C2989134064","wikidata":"https://www.wikidata.org/wiki/Q288510","display_name":"Execution time","level":2,"score":0.1871548593044281},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.14530912041664124},{"id":"https://openalex.org/C136085584","wikidata":"https://www.wikidata.org/wiki/Q910289","display_name":"Overlay","level":2,"score":0.13783752918243408},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tc.2015.2500572","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.2015.2500572","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Decent work and economic growth","score":0.4099999964237213,"id":"https://metadata.un.org/sdg/8"}],"awards":[{"id":"https://openalex.org/G160259052","display_name":null,"funder_award_id":"DG 402369-2011","funder_id":"https://openalex.org/F4320334593","funder_display_name":"Natural Sciences and Engineering Research Council of Canada"},{"id":"https://openalex.org/G2977571619","display_name":null,"funder_award_id":"CNS-1219064","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G3423019399","display_name":null,"funder_award_id":"N00014-12-1-0046","funder_id":"https://openalex.org/F4320337345","funder_display_name":"Office of Naval Research"},{"id":"https://openalex.org/G4636429263","display_name":null,"funder_award_id":"CNS-1302563","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"},{"id":"https://openalex.org/G5480120225","display_name":null,"funder_award_id":"2009-00524","funder_id":"https://openalex.org/F4320306994","funder_display_name":"Lockheed Martin"},{"id":"https://openalex.org/G5580727057","display_name":null,"funder_award_id":"RPS#6 45038","funder_id":"https://openalex.org/F4320309503","funder_display_name":"Rockwell Collins"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320306994","display_name":"Lockheed Martin","ror":"https://ror.org/026er9r08"},{"id":"https://openalex.org/F4320309503","display_name":"Rockwell Collins","ror":"https://ror.org/025vwbe15"},{"id":"https://openalex.org/F4320334593","display_name":"Natural Sciences and Engineering Research Council of Canada","ror":"https://ror.org/01h531d29"},{"id":"https://openalex.org/F4320337345","display_name":"Office of Naval Research","ror":"https://ror.org/00rk2pe57"},{"id":"https://openalex.org/F4320338279","display_name":"Air Force Office of Scientific Research","ror":"https://ror.org/011e9bt93"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":36,"referenced_works":["https://openalex.org/W1604530876","https://openalex.org/W1897593416","https://openalex.org/W1943109230","https://openalex.org/W1993079513","https://openalex.org/W2022245712","https://openalex.org/W2024105885","https://openalex.org/W2029835355","https://openalex.org/W2042979415","https://openalex.org/W2058262604","https://openalex.org/W2060435971","https://openalex.org/W2061663604","https://openalex.org/W2066719875","https://openalex.org/W2099697479","https://openalex.org/W2107417678","https://openalex.org/W2109488193","https://openalex.org/W2116514438","https://openalex.org/W2116826559","https://openalex.org/W2116954426","https://openalex.org/W2118176463","https://openalex.org/W2118378639","https://openalex.org/W2122154156","https://openalex.org/W2122969894","https://openalex.org/W2123155769","https://openalex.org/W2125783653","https://openalex.org/W2135362168","https://openalex.org/W2144901203","https://openalex.org/W2146412113","https://openalex.org/W2148016091","https://openalex.org/W2149075075","https://openalex.org/W2159411888","https://openalex.org/W2165172064","https://openalex.org/W2165683591","https://openalex.org/W2262960161","https://openalex.org/W3142152400","https://openalex.org/W3144371145","https://openalex.org/W6682152478"],"related_works":["https://openalex.org/W254684032","https://openalex.org/W126098351","https://openalex.org/W4321458411","https://openalex.org/W2247651031","https://openalex.org/W2782503170","https://openalex.org/W4317815260","https://openalex.org/W2047684617","https://openalex.org/W99066252","https://openalex.org/W3108993429","https://openalex.org/W2145484885"],"abstract_inverted_index":{"As":[0],"the":[1,27,48,96,103,106,139,173,197],"number":[2,174],"of":[3,95,105,114,117,120,126,157,175,199],"cores":[4,176,202],"increases,":[5],"more":[6],"master":[7],"components":[8],"can":[9,83,151],"simultaneously":[10],"access":[11,122,182],"main":[12,183],"memory.":[13],"In":[14,134],"real-time":[15,79],"systems,":[16],"this":[17,70,135],"ongoing":[18],"trend":[19],"is":[20,76,169],"leading":[21],"to":[22,58,180,224,243],"crippling":[23],"pessimism":[24,64],"when":[25,241],"computing":[26],"worst-case":[28],"cache":[29],"miss":[30],"time,":[31],"since":[32],"a":[33,74,115,155,204],"memory":[34,88,123,184,201],"request":[35],"could":[36],"potentially":[37],"contend":[38],"with":[39],"other":[40,45],"requests":[41],"coming":[42],"from":[43,87,191],"every":[44],"core":[46],"in":[47],"system.":[49],"CPU-centric":[50],"scheduling":[51,80,143,228],"policies,":[52],"therefore,":[53],"are":[54,178],"no":[55],"longer":[56],"sufficient":[57],"guarantee":[59],"schedulability":[60,232],"without":[61,185],"introducing":[62],"unacceptable":[63],"for":[65,145,207,213],"memory-intensive":[66,146,158,214,238],"task":[67,108,147,215,221,239],"sets.":[68,216],"For":[69],"reason,":[71],"we":[72,100,137,195,218],"believe":[73],"shift":[75],"needed":[77],"towards":[78],"approaches":[81],"that":[82,226],"prevent":[84],"timing":[85],"interference":[86],"contention,":[89],"while":[90],"still":[91],"making":[92],"efficient":[93],"use":[94,219],"multicore":[97,192,245],"platform.":[98],"Previously,":[99],"have":[101],"demonstrated":[102],"practicality":[104],"PREM":[107],"model,":[109],"where":[110],"each":[111],"job":[112],"consists":[113],"sequence":[116,156],"phases,":[118],"some":[119,125],"which":[121,127,177],"and":[124,161,230],"perform":[128],"only":[129],"computation":[130],"on":[131,172],"cached":[132],"data.":[133],"work,":[136],"present":[138],"first":[140],"global":[141],"memory-centric":[142],"policy":[144,168,229],"sets":[148,240],"whose":[149],"jobs":[150],"be":[152],"modeled":[153],"as":[154,203],"(memory":[159],"phase)":[160,164],"execution-intensive":[162],"(execution":[163],"phases.":[165],"The":[166],"proposed":[167,227],"parameterizable":[170],"based":[171],"allowed":[179],"concurrently":[181],"saturating":[186],"it.":[187],"Building":[188],"upon":[189],"results":[190],"response-time":[193],"analysis,":[194],"introduce":[196],"notion":[198],"virtual":[200],"fundamental":[205],"technique":[206],"performing":[208],"phase-based":[209],"response":[210],"time":[211],"analysis":[212],"Finally,":[217],"synthetic":[220],"set":[222],"generation":[223],"demonstrate":[225],"related":[231],"bound":[233],"do":[234],"indeed":[235],"better":[236],"schedule":[237],"compared":[242],"state-of-art":[244],"scheduling.":[246]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":6},{"year":2022,"cited_by_count":6},{"year":2021,"cited_by_count":5},{"year":2020,"cited_by_count":9},{"year":2019,"cited_by_count":6},{"year":2018,"cited_by_count":6},{"year":2017,"cited_by_count":4},{"year":2016,"cited_by_count":4}],"updated_date":"2026-04-09T08:11:56.329763","created_date":"2025-10-10T00:00:00"}