{"id":"https://openalex.org/W2085041803","doi":"https://doi.org/10.1109/tc.2015.2401019","title":"Design of Optimal Scan Tree Based on Compact Test Patterns for Test Time Reduction","display_name":"Design of Optimal Scan Tree Based on Compact Test Patterns for Test Time Reduction","publication_year":2015,"publication_date":"2015-02-06","ids":{"openalex":"https://openalex.org/W2085041803","doi":"https://doi.org/10.1109/tc.2015.2401019","mag":"2085041803"},"language":"en","primary_location":{"id":"doi:10.1109/tc.2015.2401019","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.2015.2401019","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5020614289","display_name":"Linfeng Chen","orcid":"https://orcid.org/0000-0002-0436-3197"},"institutions":[{"id":"https://openalex.org/I2250955327","display_name":"Huawei Technologies (China)","ror":"https://ror.org/00cmhce21","country_code":"CN","type":"company","lineage":["https://openalex.org/I2250955327"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Linfeng Chen","raw_affiliation_strings":["Huawei Corp., Shenzhen, P. R. China"],"affiliations":[{"raw_affiliation_string":"Huawei Corp., Shenzhen, P. R. China","institution_ids":["https://openalex.org/I2250955327"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5003304424","display_name":"Aijiao Cui","orcid":"https://orcid.org/0000-0002-4728-9265"},"institutions":[{"id":"https://openalex.org/I204983213","display_name":"Harbin Institute of Technology","ror":"https://ror.org/01yqg2h08","country_code":"CN","type":"education","lineage":["https://openalex.org/I204983213"]},{"id":"https://openalex.org/I158809036","display_name":"Shenzhen Institute of Information Technology","ror":"https://ror.org/03wrf9427","country_code":"CN","type":"education","lineage":["https://openalex.org/I158809036"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Aijiao Cui","raw_affiliation_strings":["School of Electronic and Information Engineering, Harbin Institute of Technology Shenzhen Graduate School, Xili, Shenzhen, Guangdong Province, P. R. China","School of Electronic and Information Engineering, Harbin Institute of Technology Shenzhen Graduate School, Xili, Shenzhen, Guangdong Province, P. R. China#TAB#"],"affiliations":[{"raw_affiliation_string":"School of Electronic and Information Engineering, Harbin Institute of Technology Shenzhen Graduate School, Xili, Shenzhen, Guangdong Province, P. R. China","institution_ids":["https://openalex.org/I158809036","https://openalex.org/I204983213"]},{"raw_affiliation_string":"School of Electronic and Information Engineering, Harbin Institute of Technology Shenzhen Graduate School, Xili, Shenzhen, Guangdong Province, P. R. China#TAB#","institution_ids":["https://openalex.org/I204983213"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5029335324","display_name":"Chip-Hong Chang","orcid":"https://orcid.org/0000-0002-8897-6176"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Chip-Hong Chang","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Blk S2, 50, Nanyang Avenue, Singapore","School of Electrical & Electronic Engineering, Nanyang Technological University, Nanyang Avenue,,Singapore"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Blk S2, 50, Nanyang Avenue, Singapore","institution_ids":[]},{"raw_affiliation_string":"School of Electrical & Electronic Engineering, Nanyang Technological University, Nanyang Avenue,,Singapore","institution_ids":["https://openalex.org/I172675005"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5020614289"],"corresponding_institution_ids":["https://openalex.org/I2250955327"],"apc_list":null,"apc_paid":null,"fwci":1.6149,"has_fulltext":false,"cited_by_count":11,"citation_normalized_percentile":{"value":0.8371632,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"64","issue":"12","first_page":"3417","last_page":"3429"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.9947999715805054,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.6591116786003113},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6039402484893799},{"id":"https://openalex.org/keywords/test","display_name":"Test (biology)","score":0.6013290882110596},{"id":"https://openalex.org/keywords/test-compression","display_name":"Test compression","score":0.5787444114685059},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4761279225349426},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.46543824672698975},{"id":"https://openalex.org/keywords/tree","display_name":"Tree (set theory)","score":0.4449625611305237},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.374808132648468},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.25643444061279297},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12644550204277039},{"id":"https://openalex.org/keywords/combinatorics","display_name":"Combinatorics","score":0.09266537427902222},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.08918619155883789}],"concepts":[{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.6591116786003113},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6039402484893799},{"id":"https://openalex.org/C2777267654","wikidata":"https://www.wikidata.org/wiki/Q3519023","display_name":"Test (biology)","level":2,"score":0.6013290882110596},{"id":"https://openalex.org/C29652920","wikidata":"https://www.wikidata.org/wiki/Q7705757","display_name":"Test compression","level":4,"score":0.5787444114685059},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4761279225349426},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.46543824672698975},{"id":"https://openalex.org/C113174947","wikidata":"https://www.wikidata.org/wiki/Q2859736","display_name":"Tree (set theory)","level":2,"score":0.4449625611305237},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.374808132648468},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.25643444061279297},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12644550204277039},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.09266537427902222},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.08918619155883789},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tc.2015.2401019","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.2015.2401019","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G6146408121","display_name":null,"funder_award_id":"JCYJ20130329152316637","funder_id":"https://openalex.org/F4320306491","funder_display_name":"Smith Richardson Foundation"}],"funders":[{"id":"https://openalex.org/F4320306491","display_name":"Smith Richardson Foundation","ror":"https://ror.org/01ma57r88"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":42,"referenced_works":["https://openalex.org/W1595368737","https://openalex.org/W1763985980","https://openalex.org/W1838570031","https://openalex.org/W1900996732","https://openalex.org/W1945071860","https://openalex.org/W1967644220","https://openalex.org/W1977977548","https://openalex.org/W2001817755","https://openalex.org/W2004015493","https://openalex.org/W2040241863","https://openalex.org/W2045635390","https://openalex.org/W2071316512","https://openalex.org/W2092035107","https://openalex.org/W2094548296","https://openalex.org/W2096852695","https://openalex.org/W2098411556","https://openalex.org/W2108376128","https://openalex.org/W2112744179","https://openalex.org/W2113067829","https://openalex.org/W2116429369","https://openalex.org/W2122643352","https://openalex.org/W2124088817","https://openalex.org/W2135619917","https://openalex.org/W2135627440","https://openalex.org/W2138284668","https://openalex.org/W2144273617","https://openalex.org/W2144888713","https://openalex.org/W2146594632","https://openalex.org/W2156374538","https://openalex.org/W2159056656","https://openalex.org/W2163293408","https://openalex.org/W2163814338","https://openalex.org/W2167036627","https://openalex.org/W2169854732","https://openalex.org/W2230837107","https://openalex.org/W4243061192","https://openalex.org/W6638804629","https://openalex.org/W6639759450","https://openalex.org/W6641956514","https://openalex.org/W6680410900","https://openalex.org/W6685002992","https://openalex.org/W6689553567"],"related_works":["https://openalex.org/W2003592050","https://openalex.org/W2095971709","https://openalex.org/W3004652078","https://openalex.org/W2154258156","https://openalex.org/W2341817401","https://openalex.org/W2136680550","https://openalex.org/W2143354328","https://openalex.org/W2122792690","https://openalex.org/W2140900006","https://openalex.org/W2170656965"],"abstract_inverted_index":{"Scan":[0],"tree":[1,42,62,106,167,205,227],"architecture":[2,178],"has":[3],"been":[4],"proposed":[5,128],"to":[6,32,95,129,146],"reduce":[7],"the":[8,34,57,60,102,131,148,159,162,166,175,180,191,203,211,215,225,230,238],"test":[9,29,46,71,115,212,241],"application":[10],"time":[11,213],"of":[12,59,89,104,214,224],"full":[13,216],"scan":[14,19,35,41,61,105,142,168,182,204,217,226],"chain":[15,218],"by":[16,77,173,190,207,219,229,234],"placing":[17],"multiple":[18],"cells":[20,143],"in":[21],"parallel.":[22],"Most":[23],"existing":[24],"techniques":[25],"rely":[26],"on":[27,64,109,194],"non-compact":[28],"pattern":[30],"sets":[31,47],"construct":[33],"tree.":[36],"However,":[37],"they":[38],"produce":[39],"inefficient":[40],"when":[43],"highly":[44],"compact":[45,240],"with":[48,151,184],"few":[49],"don't":[50],"cares":[51],"are":[52,126],"used.":[53],"In":[54],"this":[55],"paper,":[56],"depth":[58],"based":[63,108],"approximate":[65,124,231],"compatibility":[66,121,125,150,232],"relation":[67],"for":[68,133],"completely":[69],"specified":[70],"data":[72,116],"set":[73],"is":[74,91,144],"analyzed":[75],"probabilistically":[76],"modeling":[78],"its":[79],"construction":[80,107],"as":[81,188],"a":[82,97],"vertex":[83,134],"coloring":[84],"problem.":[85],"The":[86,136],"upper":[87],"bound":[88],"edges-per-vertex":[90,132],"computed":[92],"and":[93,112,122,197,222],"demonstrated":[94],"be":[96,171],"prime":[98],"factor":[99],"that":[100,223],"limits":[101],"efficiency":[103],"both":[110],"compatible":[111,114],"approximately":[113],"between":[117,139],"two":[118,140],"flip-flops.":[119],"Inverse":[120],"aggressive":[123],"then":[127],"increase":[130],"coloring.":[135],"Q'-SD":[137],"connection":[138],"adjacent":[141],"exploited":[145],"implement":[147],"inverse":[149],"no":[152],"cost":[153],"or":[154],"timing":[155],"impact.":[156],"To":[157],"maintain":[158],"fault":[160],"coverage,":[161],"missing":[163],"faults":[164],"under":[165,237],"mode":[169,183],"can":[170],"detected":[172],"switching":[174],"same":[176,239],"base":[177],"into":[179],"linear":[181],"negligible":[185],"hardware":[186],"overhead":[187],"shown":[189],"experimental":[192],"results":[193],"ISCAS89,":[195],"ISCAS99":[196],"LGSynth93":[198],"benchmark":[199],"circuits.":[200],"On":[201],"average,":[202],"generated":[206],"our":[208],"method":[209,233],"reduces":[210],"56.65":[220],"percent,":[221],"designed":[228],"39.18":[235],"percent":[236],"sets.":[242]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":3},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":2},{"year":2016,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
