{"id":"https://openalex.org/W2016289935","doi":"https://doi.org/10.1109/tc.2014.2346208","title":"Interleaving in Systolic-Arrays: A Throughput Breakthrough","display_name":"Interleaving in Systolic-Arrays: A Throughput Breakthrough","publication_year":2014,"publication_date":"2014-08-07","ids":{"openalex":"https://openalex.org/W2016289935","doi":"https://doi.org/10.1109/tc.2014.2346208","mag":"2016289935"},"language":"en","primary_location":{"id":"doi:10.1109/tc.2014.2346208","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.2014.2346208","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://porto.polito.it/2562945/1/TCOMPU_systolic.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5025112749","display_name":"Giovanni Causapruno","orcid":null},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Polytechnic University of Turin","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Giovanni Causapruno","raw_affiliation_strings":["Department of Electronics and Telecommunications, Politecnico di Torino, TO, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Telecommunications, Politecnico di Torino, TO, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012025330","display_name":"Marco Vacca","orcid":"https://orcid.org/0000-0003-2920-3357"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Polytechnic University of Turin","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Marco Vacca","raw_affiliation_strings":["Department of Electronics and Telecommunications, Politecnico di Torino, TO, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Telecommunications, Politecnico di Torino, TO, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036441962","display_name":"Mariagrazia Graziano","orcid":"https://orcid.org/0000-0002-8721-9990"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Polytechnic University of Turin","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Mariagrazia Graziano","raw_affiliation_strings":["Department of Electronics and Telecommunications, Politecnico di Torino, TO, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Telecommunications, Politecnico di Torino, TO, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5077512098","display_name":"Maurizio Zamboni","orcid":"https://orcid.org/0000-0001-8179-5973"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Polytechnic University of Turin","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Maurizio Zamboni","raw_affiliation_strings":["Department of Electronics and Telecommunications, Politecnico di Torino, TO, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Telecommunications, Politecnico di Torino, TO, Italy","institution_ids":["https://openalex.org/I177477856"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5025112749"],"corresponding_institution_ids":["https://openalex.org/I177477856"],"apc_list":null,"apc_paid":null,"fwci":1.0967,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.7775024,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"64","issue":"7","first_page":"1940","last_page":"1953"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/interleaving","display_name":"Interleaving","score":0.8634387254714966},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7634690999984741},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7507644295692444},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.6466062068939209},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5271249413490295},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.500542163848877},{"id":"https://openalex.org/keywords/systolic-array","display_name":"Systolic array","score":0.46082910895347595},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4510575532913208},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3773338496685028},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3725011944770813},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3718050718307495},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.24601146578788757},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.19303953647613525},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.19173583388328552},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.16631674766540527},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.16028746962547302},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11720168590545654},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.08711382746696472}],"concepts":[{"id":"https://openalex.org/C28034677","wikidata":"https://www.wikidata.org/wiki/Q17092530","display_name":"Interleaving","level":2,"score":0.8634387254714966},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7634690999984741},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7507644295692444},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.6466062068939209},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5271249413490295},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.500542163848877},{"id":"https://openalex.org/C150741067","wikidata":"https://www.wikidata.org/wiki/Q2377218","display_name":"Systolic array","level":3,"score":0.46082910895347595},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4510575532913208},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3773338496685028},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3725011944770813},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3718050718307495},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.24601146578788757},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.19303953647613525},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.19173583388328552},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.16631674766540527},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.16028746962547302},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11720168590545654},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.08711382746696472},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/tc.2014.2346208","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.2014.2346208","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},{"id":"pmh:oai:porto.polito.it:2562945","is_oa":true,"landing_page_url":"http://porto.polito.it/2562945/1/TCOMPU_systolic.pdf","pdf_url":null,"source":{"id":"https://openalex.org/S4306402038","display_name":"PORTO Publications Open Repository TOrino (Politecnico di Torino)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I177477856","host_organization_name":"Politecnico di Torino","host_organization_lineage":["https://openalex.org/I177477856"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"ISSN:0018-9340","raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":{"id":"pmh:oai:porto.polito.it:2562945","is_oa":true,"landing_page_url":"http://porto.polito.it/2562945/1/TCOMPU_systolic.pdf","pdf_url":null,"source":{"id":"https://openalex.org/S4306402038","display_name":"PORTO Publications Open Repository TOrino (Politecnico di Torino)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I177477856","host_organization_name":"Politecnico di Torino","host_organization_lineage":["https://openalex.org/I177477856"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"ISSN:0018-9340","raw_type":"info:eu-repo/semantics/article"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.4000000059604645,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":54,"referenced_works":["https://openalex.org/W1649442899","https://openalex.org/W1974131907","https://openalex.org/W1976924286","https://openalex.org/W1978514662","https://openalex.org/W1979305515","https://openalex.org/W1983788671","https://openalex.org/W1983849809","https://openalex.org/W1985450948","https://openalex.org/W1992890411","https://openalex.org/W2012763482","https://openalex.org/W2015915218","https://openalex.org/W2016865630","https://openalex.org/W2017857945","https://openalex.org/W2018334481","https://openalex.org/W2027152886","https://openalex.org/W2032791864","https://openalex.org/W2039758891","https://openalex.org/W2041722778","https://openalex.org/W2049176002","https://openalex.org/W2059986791","https://openalex.org/W2065310826","https://openalex.org/W2071696716","https://openalex.org/W2075261929","https://openalex.org/W2080979414","https://openalex.org/W2082899128","https://openalex.org/W2092978386","https://openalex.org/W2093218262","https://openalex.org/W2095472412","https://openalex.org/W2100529701","https://openalex.org/W2107979398","https://openalex.org/W2110078994","https://openalex.org/W2116031583","https://openalex.org/W2116495135","https://openalex.org/W2120594828","https://openalex.org/W2125914648","https://openalex.org/W2126382200","https://openalex.org/W2128369966","https://openalex.org/W2128962871","https://openalex.org/W2129168928","https://openalex.org/W2133692010","https://openalex.org/W2136789345","https://openalex.org/W2145935261","https://openalex.org/W2148837717","https://openalex.org/W2149572032","https://openalex.org/W2169373379","https://openalex.org/W2169442725","https://openalex.org/W2171828155","https://openalex.org/W2540088678","https://openalex.org/W3149204854","https://openalex.org/W4205874723","https://openalex.org/W6637173538","https://openalex.org/W6673827446","https://openalex.org/W6673874240","https://openalex.org/W6684958208"],"related_works":["https://openalex.org/W1655266410","https://openalex.org/W2389051085","https://openalex.org/W1901012776","https://openalex.org/W2463883322","https://openalex.org/W2330343234","https://openalex.org/W2814468324","https://openalex.org/W2229382548","https://openalex.org/W2391789612","https://openalex.org/W2389236462","https://openalex.org/W1614034078"],"abstract_inverted_index":{"In":[0,17,112],"past":[1],"years":[2,19],"the":[3,14,23,34,77,133,165,169,192,200],"most":[4],"common":[5],"way":[6],"to":[7,12,39,76,88,120,147,162,175,184],"improve":[8,41,121,164],"computers":[9,29],"performance":[10,124],"was":[11],"increase":[13],"clock":[15],"frequency.":[16],"recent":[18],"this":[20,113,173],"approach":[21],"suffered":[22],"limits":[24],"of":[25,36,63,70,79,139,168,187],"technology":[26,150],"scaling,":[27],"therefore":[28],"architectures":[30,48],"are":[31,49,57,84],"shifting":[32],"toward":[33,199],"direction":[35],"parallel":[37],"computing":[38],"further":[40],"circuits":[42],"performance.":[43],"Not":[44],"only":[45],"GPU":[46],"based":[47,101],"spreading":[50],"in":[51,68],"consideration,":[52],"but":[53],"also":[54],"Systolic":[55,71,122],"Arrays":[56,72,123],"particularly":[58],"suited":[59],"for":[60],"certain":[61],"classes":[62],"algorithms.":[64],"An":[65],"important":[66],"point":[67,138],"favor":[69],"is":[73,160,182],"that,":[74],"due":[75],"regularity":[78],"their":[80,188],"circuit":[81],"layout,":[82],"they":[83],"appealing":[85],"when":[86],"applied":[87],"many":[89],"emerging":[90,152,176],"and":[91,99,127,142,151],"very":[92],"promising":[93],"technologies,":[94],"like":[95],"Quantum-dot":[96],"Cellular":[97],"Automata":[98],"nanoarrays":[100],"on":[102,106],"Silicon":[103],"NanoWire":[104],"or":[105],"Carbon":[107],"nanotube":[108],"Field":[109],"Effect":[110],"Transistors.":[111],"work":[114],"we":[115,144,156,178],"present":[116],"a":[117,136,195],"systematic":[118],"method":[119],"exploiting":[125],"Pipelining":[126],"Input":[128],"Data":[129],"Interleaving.":[130],"We":[131],"tackle":[132],"problem":[134],"from":[135],"theoretical":[137],"view":[140],"first,":[141],"then":[143],"apply":[145],"it":[146,159,181],"both":[148],"CMOS":[149,155],"technologies.":[153],"On":[154],"demonstrate":[157],"that":[158,180],"possible":[161,183],"vastly":[163],"overall":[166],"throughput":[167],"circuit.":[170],"By":[171],"applying":[172],"technique":[174],"technologies":[177],"show":[179],"overcome":[185],"some":[186],"limitations":[189],"greatly":[190],"improving":[191],"throughput,":[193],"making":[194],"considerable":[196],"step":[197],"forward":[198],"post-CMOS":[201],"era.":[202]},"counts_by_year":[{"year":2018,"cited_by_count":2},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}
