{"id":"https://openalex.org/W2043529296","doi":"https://doi.org/10.1109/tc.2011.201","title":"Cost Effective Protection Techniques for TCAM Memory Arrays","display_name":"Cost Effective Protection Techniques for TCAM Memory Arrays","publication_year":2011,"publication_date":"2011-10-13","ids":{"openalex":"https://openalex.org/W2043529296","doi":"https://doi.org/10.1109/tc.2011.201","mag":"2043529296"},"language":"en","primary_location":{"id":"doi:10.1109/tc.2011.201","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.2011.201","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5069705909","display_name":"Isidoros Sideris","orcid":null},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":true,"raw_author_name":"Isidoros Sideris","raw_affiliation_strings":["School of Electrical and Computer Engineering, Microprocessors and Digital Systems Laboratory, National and Technical University of Athens, Athens, Greece","Sch. of Electr. & Comput. Eng., Nat. Technol. Univ. of Athens, Athens, Greece"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Microprocessors and Digital Systems Laboratory, National and Technical University of Athens, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]},{"raw_affiliation_string":"Sch. of Electr. & Comput. Eng., Nat. Technol. Univ. of Athens, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5088085592","display_name":"Kiamal Pekmestzi","orcid":"https://orcid.org/0000-0001-8612-2700"},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Kiamal Pekmestzi","raw_affiliation_strings":["School of Electrical and Computer Engineering, Microprocessors and Digital Systems Laboratory, National and Technical University of Athens, Athens, Greece","Sch. of Electr. & Comput. Eng., Nat. Technol. Univ. of Athens, Athens, Greece"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Microprocessors and Digital Systems Laboratory, National and Technical University of Athens, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]},{"raw_affiliation_string":"Sch. of Electr. & Comput. Eng., Nat. Technol. Univ. of Athens, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5069705909"],"corresponding_institution_ids":["https://openalex.org/I174458059"],"apc_list":null,"apc_paid":null,"fwci":0.2519,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.54872578,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"61","issue":"12","first_page":"1778","last_page":"1788"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10714","display_name":"Software-Defined Networks and 5G","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/redundancy","display_name":"Redundancy (engineering)","score":0.7949138879776001},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7813249230384827},{"id":"https://openalex.org/keywords/error-detection-and-correction","display_name":"Error detection and correction","score":0.6829744577407837},{"id":"https://openalex.org/keywords/content-addressable-memory","display_name":"Content-addressable memory","score":0.53634113073349},{"id":"https://openalex.org/keywords/parity-bit","display_name":"Parity bit","score":0.4754854440689087},{"id":"https://openalex.org/keywords/content-addressable-storage","display_name":"Content-addressable storage","score":0.4568091928958893},{"id":"https://openalex.org/keywords/fault-tolerance","display_name":"Fault tolerance","score":0.433758020401001},{"id":"https://openalex.org/keywords/cyclic-redundancy-check","display_name":"Cyclic redundancy check","score":0.411639928817749},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4035354256629944},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3674340844154358},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3618466854095459},{"id":"https://openalex.org/keywords/decoding-methods","display_name":"Decoding methods","score":0.153811514377594},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.08264744281768799}],"concepts":[{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.7949138879776001},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7813249230384827},{"id":"https://openalex.org/C103088060","wikidata":"https://www.wikidata.org/wiki/Q1062839","display_name":"Error detection and correction","level":2,"score":0.6829744577407837},{"id":"https://openalex.org/C53442348","wikidata":"https://www.wikidata.org/wiki/Q745101","display_name":"Content-addressable memory","level":3,"score":0.53634113073349},{"id":"https://openalex.org/C131521367","wikidata":"https://www.wikidata.org/wiki/Q625502","display_name":"Parity bit","level":2,"score":0.4754854440689087},{"id":"https://openalex.org/C2778618852","wikidata":"https://www.wikidata.org/wiki/Q1128613","display_name":"Content-addressable storage","level":4,"score":0.4568091928958893},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.433758020401001},{"id":"https://openalex.org/C137627569","wikidata":"https://www.wikidata.org/wiki/Q245471","display_name":"Cyclic redundancy check","level":3,"score":0.411639928817749},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4035354256629944},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3674340844154358},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3618466854095459},{"id":"https://openalex.org/C57273362","wikidata":"https://www.wikidata.org/wiki/Q576722","display_name":"Decoding methods","level":2,"score":0.153811514377594},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.08264744281768799},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.0},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/tc.2011.201","is_oa":false,"landing_page_url":"https://doi.org/10.1109/tc.2011.201","pdf_url":null,"source":{"id":"https://openalex.org/S157670870","display_name":"IEEE Transactions on Computers","issn_l":"0018-9340","issn":["0018-9340","1557-9956","2326-3814"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Transactions on Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Peace, Justice and strong institutions","id":"https://metadata.un.org/sdg/16","score":0.8100000023841858}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":27,"referenced_works":["https://openalex.org/W141121412","https://openalex.org/W1549071886","https://openalex.org/W1980073965","https://openalex.org/W1989874002","https://openalex.org/W2014466003","https://openalex.org/W2038394953","https://openalex.org/W2048760438","https://openalex.org/W2052778063","https://openalex.org/W2061267212","https://openalex.org/W2062143991","https://openalex.org/W2083953017","https://openalex.org/W2100624635","https://openalex.org/W2116244405","https://openalex.org/W2117648153","https://openalex.org/W2120978650","https://openalex.org/W2135719553","https://openalex.org/W2136444750","https://openalex.org/W2136849670","https://openalex.org/W2147409023","https://openalex.org/W2157447136","https://openalex.org/W2168793636","https://openalex.org/W2170382128","https://openalex.org/W2336215235","https://openalex.org/W2342204193","https://openalex.org/W3150716070","https://openalex.org/W4231535434","https://openalex.org/W6681516034"],"related_works":["https://openalex.org/W1741242256","https://openalex.org/W2381700808","https://openalex.org/W4312609455","https://openalex.org/W44821633","https://openalex.org/W2999612013","https://openalex.org/W2915853676","https://openalex.org/W2377071794","https://openalex.org/W2798422626","https://openalex.org/W2580947557","https://openalex.org/W2003152069"],"abstract_inverted_index":{"This":[0,54],"paper":[1],"presents":[2],"low":[3,71],"cost":[4,39,72],"techniques":[5,18],"for":[6,28,129],"error":[7,73,80,105],"detection":[8,35],"and":[9,62,69,115,124],"correction":[10,74,81],"in":[11,119],"Ternary":[12],"Content":[13],"Addressable":[14],"Memories":[15],"(TCAMs).":[16],"The":[17,107],"exploit":[19],"the":[20,38,45,66,91,98],"inherent":[21],"redundancy":[22],"of":[23,40,48,65,90,97],"TCAM":[24,67,99,130],"cells":[25],"to":[26],"allow":[27],"protection":[29],"at":[30,59],"lower":[31],"cost.":[32],"A":[33],"fault":[34],"technique":[36,55],"with":[37,43,111,121],"parity":[41],"but":[42],"about":[44],"half":[46,92],"probability":[47],"silent":[49],"data":[50],"corruption":[51],"is":[52,56,76,83],"proposed.":[53],"then":[57],"applied":[58],"both":[60],"horizontal":[61],"vertical":[63],"dimensions":[64],"array,":[68],"a":[70,87],"scheme":[75,82],"derived.":[77],"Last,":[78],"another":[79],"proposed,":[84],"which":[85],"employs":[86],"SECDED":[88],"ECC":[89],"complexity,":[93],"by":[94],"making":[95],"use":[96],"redundancy,":[100],"without":[101],"compromising":[102],"single":[103],"bit":[104],"correction.":[106],"proposed":[108],"schemes":[109],"come":[110],"minimal":[112],"area,":[113],"power,":[114],"critical":[116],"path":[117],"overheads,":[118],"comparison":[120],"standard":[122],"schemes,":[123],"they":[125],"are":[126],"good":[127],"alternatives":[128],"arrays":[131],"protection.":[132]},"counts_by_year":[{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}